/external/llvm/test/CodeGen/Hexagon/ |
ashift-left-right.ll | 7 %shl1 = shl i32 16, %a 9 %ret = mul i32 %shl1, %shl2 17 %shl1 = ashr i32 16, %a 19 %ret = mul i32 %shl1, %shl2
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/external/llvm/test/CodeGen/X86/ |
targetLoweringGeneric.ll | 23 %shl1 = shl i32 %xor3, %i32In4 24 %sub1 = sub i32 %or2, %shl1
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vec_shift4.ll | 3 define <2 x i64> @shl1(<4 x i32> %r, <4 x i32> %a) nounwind readnone ssp {
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legalize-shift-64.ll | 78 %shl1 = shl i64 1, %sh_prom 79 %cmp = icmp ne i64 %shl1, 4294967296
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sse2-vector-shifts.ll | 291 %shl1 = shl <4 x i32> %shl0, <i32 4, i32 4, i32 4, i32 4> 292 ret <4 x i32> %shl1 300 %shl1 = shl <4 x i32> %shl0, <i32 4, i32 4, i32 4, i32 4> 301 ret <4 x i32> %shl1 310 %shl1 = shl <4 x i32> %shl0, <i32 5, i32 5, i32 5, i32 5> 311 ret <4 x i32> %shl1 341 %shl1 = shl <4 x i32> %ext, <i32 17, i32 17, i32 17, i32 17> 342 ret <4 x i32> %shl1
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remat-invalid-liveness.ll | 45 %shl1.i.i = shl nuw nsw i128 %bf.lshr.i.i, 8 46 %shl.i.i = trunc i128 %shl1.i.i to i32
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/external/llvm/test/Transforms/InstCombine/ |
nsw.ll | 31 ; CHECK-LABEL: @shl1( 34 define i64 @shl1(i64 %X, i64* %P) nounwind {
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rem.ll | 193 ; CHECK-NEXT: [[SHL1:%.*]] = shl i32 1, %x 195 ; CHECK-NEXT: [[AND:%.*]] = and i32 [[SHL1]], [[SHL2]] 196 ; CHECK-NEXT: [[ADD:%.*]] = add i32 [[AND]], [[SHL1]]
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shift.ll | 584 %shl1 = shl i32 1, %b 585 %shl2 = shl i32 %shl1, 2
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/external/llvm/test/Transforms/Inline/ |
inline_minisize.ll | 116 %shl1 = shl i32 %tmp3, 1 117 %add = add nsw i32 %shl1, 13
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/external/llvm/test/CodeGen/AArch64/ |
arm64-bitfield-extract.ll | 309 %shl1 = shl i32 %or1, 2 310 store i32 %shl1, i32* %y, align 8 339 %shl1 = shl i64 %or1, 2 340 store i64 %shl1, i64* %y, align 8
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/external/chromium_org/v8/test/webkit/fast/js/kde/ |
md5-1.js | 72 function shl1(a) { function 87 for (var i=0;i<b;i++) a=shl1(a);
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/bionic/libc/arch-x86/atom/string/ |
ssse3-strcpy-atom.S | 240 je L(Shl1) 419 L(Shl1): [all...] |