| /external/libexif/libexif/fuji/ |
| mnote-fuji-entry.c | 197 ExifSRational vsr; local
291 vsr = exif_get_srational (entry->data, entry->order);
292 if (!vsr.denominator) break;
293 snprintf (val, maxlen, "%2.4f", (double) vsr.numerator /
294 vsr.denominator);
|
| /external/clang/test/CodeGen/ |
| builtins-ppc-altivec.c | [all...] |
| /external/valgrind/main/VEX/pub/ |
| libvex_guest_ppc32.h | 95 // using a 64x128-bit vector. These are referred to as VSR[0..63].
97 // of VSR[0..31]. The 32x128-bit vector registers defined by the "Vector
98 // Facility [Category: Vector]" are now mapped to VSR[32..63].
|
| libvex_guest_ppc64.h | 133 // using a 64x128-bit vector. These are referred to as VSR[0..63].
135 // of VSR[0..31]. The 32x128-bit vector registers defined by the "Vector
136 // Facility [Category: Vector]" are now mapped to VSR[32..63].
|
| /external/valgrind/main/none/tests/ppc32/ |
| jm-vmx.stdout.exp | [all...] |
| jm-vmx.stdout.exp_Minus_nan | [all...] |
| jm-insns.c | [all...] |
| /external/valgrind/main/none/tests/ppc64/ |
| jm-vmx.stdout.exp | [all...] |
| jm-vmx.stdout.exp_Minus_nan | [all...] |
| test_isa_2_07_part1.c | [all...] |
| /external/libexif/libexif/olympus/ |
| mnote-olympus-entry.c | 280 ExifSRational vsr; local
805 vsr = exif_get_srational (entry->data, entry->order);
806 if (!vsr.denominator) {
809 r = R2D(vsr);
|
| /external/llvm/lib/Target/PowerPC/ |
| PPCSchedule.td | 486 // vsr IIC_VecVSR
|
| PPCInstrAltivec.td | 597 def VSR : VX1_Int_Ty< 708, "vsr" , int_ppc_altivec_vsr, v4i32>;
[all...] |
| /external/llvm/test/MC/PowerPC/ |
| ppc64-encoding-vmx.s | 149 # CHECK-BE: vsr 2, 3, 4 # encoding: [0x10,0x43,0x22,0xc4]
150 # CHECK-LE: vsr 2, 3, 4 # encoding: [0xc4,0x22,0x43,0x10]
151 vsr 2, 3, 4
|
| /external/llvm/include/llvm/IR/ |
| IntrinsicsPowerPC.td | 443 def int_ppc_altivec_vsr : PowerPC_Vec_WWW_Intrinsic<"vsr">;
|
| /external/llvm/test/MC/Disassembler/PowerPC/ |
| ppc64-encoding-vmx.txt | 135 # CHECK: vsr 2, 3, 4
|
| /external/valgrind/main/memcheck/ |
| mc_machine.c | 224 // using a 64x128-bit vector. These are referred to as VSR[0..63].
226 // of VSR[0..31]. The 32x128-bit vector registers defined by the "Vector
227 // Facility [Category: Vector]" are now mapped to VSR[32..63].
425 // using a 64x128-bit vector. These are referred to as VSR[0..63].
427 // of VSR[0..31]. The 32x128-bit vector registers defined by the "Vector
428 // Facility [Category: Vector]" are now mapped to VSR[32..63].
[all...] |
| /external/valgrind/main/VEX/switchback/ |
| test_ppc_jm1.c | [all...] |
| /external/valgrind/main/VEX/priv/ |
| guest_ppc_toIR.c | [all...] |
| host_ppc_defs.c | 707 case Pav_SHR: return "vsr"; // ' ',b,h,w,dw
[all...] |
| /external/qemu/disas/ |
| ppc.c | [all...] |
| /prebuilts/clang/linux-x86/host/3.4/bin/ |
| llvm-as | |
| llvm-dis | |
| llvm-link | |
| /prebuilts/clang/linux-x86/host/3.5/bin/ |
| llvm-as | |
