1 2 ; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s 3 4 ; CHECK: @cube 5 ; CHECK: CUBE T{{[0-9]}}.X 6 ; CHECK: CUBE T{{[0-9]}}.Y 7 ; CHECK: CUBE T{{[0-9]}}.Z 8 ; CHECK: CUBE * T{{[0-9]}}.W 9 define void @cube() #0 { 10 main_body: 11 %0 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 9) 12 %1 = extractelement <4 x float> %0, i32 3 13 %2 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 9) 14 %3 = extractelement <4 x float> %2, i32 0 15 %4 = fdiv float %3, %1 16 %5 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 9) 17 %6 = extractelement <4 x float> %5, i32 1 18 %7 = fdiv float %6, %1 19 %8 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 9) 20 %9 = extractelement <4 x float> %8, i32 2 21 %10 = fdiv float %9, %1 22 %11 = insertelement <4 x float> undef, float %4, i32 0 23 %12 = insertelement <4 x float> %11, float %7, i32 1 24 %13 = insertelement <4 x float> %12, float %10, i32 2 25 %14 = insertelement <4 x float> %13, float 1.000000e+00, i32 3 26 %15 = call <4 x float> @llvm.AMDGPU.cube(<4 x float> %14) 27 %16 = extractelement <4 x float> %15, i32 0 28 %17 = extractelement <4 x float> %15, i32 1 29 %18 = extractelement <4 x float> %15, i32 2 30 %19 = extractelement <4 x float> %15, i32 3 31 %20 = call float @fabs(float %18) 32 %21 = fdiv float 1.000000e+00, %20 33 %22 = fmul float %16, %21 34 %23 = fadd float %22, 1.500000e+00 35 %24 = fmul float %17, %21 36 %25 = fadd float %24, 1.500000e+00 37 %26 = insertelement <4 x float> undef, float %25, i32 0 38 %27 = insertelement <4 x float> %26, float %23, i32 1 39 %28 = insertelement <4 x float> %27, float %19, i32 2 40 %29 = insertelement <4 x float> %28, float %25, i32 3 41 %30 = call <4 x float> @llvm.AMDGPU.tex(<4 x float> %29, i32 16, i32 0, i32 4) 42 call void @llvm.R600.store.swizzle(<4 x float> %30, i32 0, i32 0) 43 ret void 44 } 45 46 ; Function Attrs: readnone 47 declare <4 x float> @llvm.AMDGPU.cube(<4 x float>) #1 48 49 ; Function Attrs: readnone 50 declare float @fabs(float) #1 51 52 ; Function Attrs: readnone 53 declare <4 x float> @llvm.AMDGPU.tex(<4 x float>, i32, i32, i32) #1 54 55 declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32) 56 57 attributes #0 = { "ShaderType"="0" } 58 attributes #1 = { readnone } 59 60
