1 ; RUN: llc < %s -march=xcore | FileCheck %s 2 3 %0 = type { i32, i32, i32, i32 } 4 %1 = type { i32, i32, i32, i32, i32 } 5 6 ; Structs of 4 words are returned in registers 7 define internal %0 @ReturnBigStruct() nounwind readnone { 8 entry: 9 %0 = insertvalue %0 zeroinitializer, i32 12, 0 10 %1 = insertvalue %0 %0, i32 24, 1 11 %2 = insertvalue %0 %1, i32 48, 2 12 %3 = insertvalue %0 %2, i32 24601, 3 13 ret %0 %3 14 } 15 ; CHECK-LABEL: ReturnBigStruct: 16 ; CHECK: ldc r0, 12 17 ; CHECK: ldc r1, 24 18 ; CHECK: ldc r2, 48 19 ; CHECK: ldc r3, 24601 20 ; CHECK: retsp 0 21 22 ; Structs of more than 4 words are partially returned in memory so long as the 23 ; function is not variadic. 24 define { i32, i32, i32, i32, i32} @f(i32, i32, i32, i32, i32) nounwind readnone { 25 ; CHECK-LABEL: f: 26 ; CHECK: ldc [[REGISTER:r[0-9]+]], 5 27 ; CHECK-NEXT: stw [[REGISTER]], sp[2] 28 ; CHECK-NEXT: retsp 0 29 body: 30 ret { i32, i32, i32, i32, i32} { i32 undef, i32 undef, i32 undef, i32 undef, i32 5} 31 } 32 33 @x = external global i32 34 @y = external global i32 35 36 ; Check we call a function returning more than 4 words correctly. 37 define i32 @g() nounwind { 38 ; CHECK-LABEL: g: 39 ; CHECK: entsp 3 40 ; CHECK: ldc [[REGISTER:r[0-9]+]], 0 41 ; CHECK: stw [[REGISTER]], sp[1] 42 ; CHECK: bl f 43 ; CHECK-NEXT: ldw r0, sp[2] 44 ; CHECK-NEXT: retsp 3 45 ; 46 body: 47 %0 = call { i32, i32, i32, i32, i32 } @f(i32 0, i32 0, i32 0, i32 0, i32 0) 48 %1 = extractvalue { i32, i32, i32, i32, i32 } %0, 4 49 ret i32 %1 50 } 51 52 ; Variadic functions return structs bigger than 4 words via a hidden 53 ; sret-parameter 54 define internal %1 @ReturnBigStruct2(i32 %dummy, ...) nounwind readnone { 55 entry: 56 %0 = insertvalue %1 zeroinitializer, i32 12, 0 57 %1 = insertvalue %1 %0, i32 24, 1 58 %2 = insertvalue %1 %1, i32 48, 2 59 %3 = insertvalue %1 %2, i32 24601, 3 60 %4 = insertvalue %1 %3, i32 4321, 4 61 ret %1 %4 62 } 63 ; CHECK-LABEL: ReturnBigStruct2: 64 ; CHECK: ldc r1, 4321 65 ; CHECK: stw r1, r0[4] 66 ; CHECK: ldc r1, 24601 67 ; CHECK: stw r1, r0[3] 68 ; CHECK: ldc r1, 48 69 ; CHECK: stw r1, r0[2] 70 ; CHECK: ldc r1, 24 71 ; CHECK: stw r1, r0[1] 72 ; CHECK: ldc r1, 12 73 ; CHECK: stw r1, r0[0] 74 ; CHECK: retsp 0 75
