Lines Matching refs:cu_
152 return cu_->target64 ? x86_64_loc_c_return_ref : x86_loc_c_return_ref;
156 return cu_->target64 ? x86_64_loc_c_return_wide : x86_loc_c_return_wide;
253 return cu_->target64 ? RegStorage32FromSpecialTargetRegister_Target64[reg]
279 DCHECK(cu_->instruction_set == kX86 || cu_->instruction_set == kX86_64);
472 if (!cu_->target64) {
483 return cu_->target64 || reg.GetRegNum() < rs_rX86_SP_32.GetRegNum();
488 if (cu_->target64) {
551 if (cu_->target64) {
572 if (cu_->target64) {
601 if (!cu_->compiler_driver->GetInstructionSetFeatures()->IsSmp()) {
642 if (cu_->target64) {
657 const ArrayRef<const RegStorage> *xp_regs = cu_->target64 ? &xp_regs_64 : &xp_regs_32;
662 const ArrayRef<const RegStorage> *xp_temps = cu_->target64 ? &xp_temps_64 : &xp_temps_32;
669 if (cu_->target64) {
694 if (cu_->target64) {
721 int num_vector_temps = cu_->target64 ? xp_temps_64.size() : xp_temps_32.size();
742 frame_size_ - (GetInstructionSetPointerSize(cu_->instruction_set) * num_core_spills_);
743 OpSize size = cu_->target64 ? k64 : k32;
744 const RegStorage rs_rSP = cu_->target64 ? rs_rX86_SP_64 : rs_rX86_SP_32;
748 RegStorage r_src = cu_->target64 ? RegStorage::Solo64(reg) : RegStorage::Solo32(reg);
750 cfi_.RelOffset(DwarfCoreReg(cu_->target64, reg), offset);
751 offset += GetInstructionSetPointerSize(cu_->instruction_set);
762 int offset = frame_size_ - (GetInstructionSetPointerSize(cu_->instruction_set) * num_core_spills_);
763 OpSize size = cu_->target64 ? k64 : k32;
764 const RegStorage rs_rSP = cu_->target64 ? rs_rX86_SP_64 : rs_rX86_SP_32;
767 RegStorage r_dest = cu_->target64 ? RegStorage::Solo64(reg) : RegStorage::Solo32(reg);
769 cfi_.Restore(DwarfCoreReg(cu_->target64, reg));
770 offset += GetInstructionSetPointerSize(cu_->instruction_set);
781 (GetInstructionSetPointerSize(cu_->instruction_set) * (num_fp_spills_ + num_core_spills_));
782 const RegStorage rs_rSP = cu_->target64 ? rs_rX86_SP_64 : rs_rX86_SP_32;
786 cfi_.RelOffset(DwarfFpReg(cu_->target64, reg), offset);
797 (GetInstructionSetPointerSize(cu_->instruction_set) * (num_fp_spills_ + num_core_spills_));
798 const RegStorage rs_rSP = cu_->target64 ? rs_rX86_SP_64 : rs_rX86_SP_32;
803 cfi_.Restore(DwarfFpReg(cu_->target64, reg));
822 if (cu_->target64) {
873 if (cu_->target64) {
1031 cu_->target64 ? 8 : 4).Int32Value());
1050 DCHECK_EQ(GetInstructionSetAlignment(cu_->instruction_set), 16u);
1135 RegStorage tmp_reg = cu_->target64 ? rs_r11 : rs_rBX;
1261 RegStorage rs_tmp = cu_->target64 ? rs_r11 : rs_rBX;
1317 if (!cu_->target64) {
1323 cfi_.RelOffset(DwarfCoreReg(cu_->target64, rs_rDI.GetReg()), 0);
1358 if (!cu_->target64 && rl_start.location != kLocPhysReg) {
1418 if (!cu_->target64) {
1422 cfi_.Restore(DwarfCoreReg(cu_->target64, rs_rDI.GetReg()));
1572 if (cu_->target64) {
2057 if (cu_->target64) {
2192 if (cu_->target64) {
2239 if (!cu_->target64 && opsize == k64) {
2469 if (cu_->target64) {
2531 int current_dest_offset = StackVisitor::GetOutVROffset(first, cu_->instruction_set);
