Cross Reference: /art/compiler/optimizing/code_generator

Lines Matching refs:temps
438   // VIXL uses at most 1 GPR. VIXL has 2 GPR and 1 FPR temps, and there should be no intersecting
439   // cycles on ARM64, so we always have 1 GPR and 1 FPR available VIXL temps to resolve the
489     UseScratchRegisterScope temps(masm);
490     Register temp = temps.AcquireX();
557       UseScratchRegisterScope temps(GetVIXLAssembler());
559           ? temps.AcquireW()
560           : temps.AcquireX();
607   UseScratchRegisterScope temps(GetVIXLAssembler());
608   Register card = temps.AcquireX();
609   Register temp = temps.AcquireW();   // Index within the CardTable - 32bit.
787       UseScratchRegisterScope temps(GetVIXLAssembler());
791         temp = temps.AcquireW();
793         temp = temps.AcquireX();
795         temp = temps.AcquireS();
798         temp = temps.AcquireD();
805       UseScratchRegisterScope temps(GetVIXLAssembler());
807       FPRegister temp = destination.IsDoubleStackSlot() ? temps.AcquireD() : temps.AcquireS();
848   UseScratchRegisterScope temps(masm);
849   Register temp_base = temps.AcquireX();
889       Register temp = dst.Is64Bits() ? temps.AcquireX() : temps.AcquireW();
928   UseScratchRegisterScope temps(GetVIXLAssembler());
929   Register temp_base = temps.AcquireX();
958       Register temp = src.Is64Bits() ? temps.AcquireX() : temps.AcquireW();
993   UseScratchRegisterScope temps(GetVIXLAssembler());
994   Register temp = temps.AcquireW();
1053   UseScratchRegisterScope temps(codegen_->GetVIXLAssembler());
1054   Register temp = temps.AcquireW();
1337   UseScratchRegisterScope temps(masm);
1344     Register temp = temps.AcquireSameSizeAs(obj);
1408       UseScratchRegisterScope temps(masm);
1414         Register temp = temps.AcquireSameSizeAs(obj);
2482       UseScratchRegisterScope temps(GetVIXLAssembler());
2486       Register temp = temps.AcquireSameSizeAs(output);
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