Lines Matching full:destination
616 void CodeGeneratorX86_64::Move(Location destination, Location source) {
617 if (source.Equals(destination)) {
620 if (destination.IsRegister()) {
622 __ movq(destination.AsRegister<CpuRegister>(), source.AsRegister<CpuRegister>());
624 __ movd(destination.AsRegister<CpuRegister>(), source.AsFpuRegister<XmmRegister>());
626 __ movl(destination.AsRegister<CpuRegister>(),
630 __ movq(destination.AsRegister<CpuRegister>(),
633 } else if (destination.IsFpuRegister()) {
635 __ movd(destination.AsFpuRegister<XmmRegister>(), source.AsRegister<CpuRegister>());
637 __ movaps(destination.AsFpuRegister<XmmRegister>(), source.AsFpuRegister<XmmRegister>());
639 __ movss(destination.AsFpuRegister<XmmRegister>(),
643 __ movsd(destination.AsFpuRegister<XmmRegister>(),
646 } else if (destination.IsStackSlot()) {
648 __ movl(Address(CpuRegister(RSP), destination.GetStackIndex()),
651 __ movss(Address(CpuRegister(RSP), destination.GetStackIndex()),
656 __ movl(Address(CpuRegister(RSP), destination.GetStackIndex()), Immediate(value));
660 __ movl(Address(CpuRegister(RSP), destination.GetStackIndex()), CpuRegister(TMP));
663 DCHECK(destination.IsDoubleStackSlot());
665 __ movq(Address(CpuRegister(RSP), destination.GetStackIndex()),
668 __ movsd(Address(CpuRegister(RSP), destination.GetStackIndex()),
680 __ movq(Address(CpuRegister(RSP), destination.GetStackIndex()), CpuRegister(TMP));
684 __ movq(Address(CpuRegister(RSP), destination.GetStackIndex()), CpuRegister(TMP));
3902 Location destination = move->GetDestination();
3905 if (destination.IsRegister()) {
3906 __ movq(destination.AsRegister<CpuRegister>(), source.AsRegister<CpuRegister>());
3907 } else if (destination.IsStackSlot()) {
3908 __ movl(Address(CpuRegister(RSP), destination.GetStackIndex()),
3911 DCHECK(destination.IsDoubleStackSlot());
3912 __ movq(Address(CpuRegister(RSP), destination.GetStackIndex()),
3916 if (destination.IsRegister()) {
3917 __ movl(destination.AsRegister<CpuRegister>(),
3919 } else if (destination.IsFpuRegister()) {
3920 __ movss(destination.AsFpuRegister<XmmRegister>(),
3923 DCHECK(destination.IsStackSlot());
3925 __ movl(Address(CpuRegister(RSP), destination.GetStackIndex()), CpuRegister(TMP));
3928 if (destination.IsRegister()) {
3929 __ movq(destination.AsRegister<CpuRegister>(),
3931 } else if (destination.IsFpuRegister()) {
3932 __ movsd(destination.AsFpuRegister<XmmRegister>(),
3935 DCHECK(destination.IsDoubleStackSlot()) << destination;
3937 __ movq(Address(CpuRegister(RSP), destination.GetStackIndex()), CpuRegister(TMP));
3943 if (destination.IsRegister()) {
3945 __ xorl(destination.AsRegister<CpuRegister>(), destination.AsRegister<CpuRegister>());
3947 __ movl(destination.AsRegister<CpuRegister>(), Immediate(value));
3950 DCHECK(destination.IsStackSlot()) << destination;
3951 __ movl(Address(CpuRegister(RSP), destination.GetStackIndex()), Immediate(value));
3955 if (destination.IsRegister()) {
3956 codegen_->Load64BitValue(destination.AsRegister<CpuRegister>(), value);
3958 DCHECK(destination.IsDoubleStackSlot()) << destination;
3960 __ movq(Address(CpuRegister(RSP), destination.GetStackIndex()), CpuRegister(TMP));
3965 if (destination.IsFpuRegister()) {
3966 XmmRegister dest = destination.AsFpuRegister<XmmRegister>();
3974 DCHECK(destination.IsStackSlot()) << destination;
3976 __ movl(Address(CpuRegister(RSP), destination.GetStackIndex()), imm);
3982 if (destination.IsFpuRegister()) {
3983 XmmRegister dest = destination.AsFpuRegister<XmmRegister>();
3990 DCHECK(destination.IsDoubleStackSlot()) << destination;
3992 __ movq(Address(CpuRegister(RSP), destination.GetStackIndex()), CpuRegister(TMP));
3996 if (destination.IsFpuRegister()) {
3997 __ movaps(destination.AsFpuRegister<XmmRegister>(), source.AsFpuRegister<XmmRegister>());
3998 } else if (destination.IsStackSlot()) {
3999 __ movss(Address(CpuRegister(RSP), destination.GetStackIndex()),
4002 DCHECK(destination.IsDoubleStackSlot()) << destination;
4003 __ movsd(Address(CpuRegister(RSP), destination.GetStackIndex()),
4062 Location destination = move->GetDestination();
4064 if (source.IsRegister() && destination.IsRegister()) {
4065 __ xchgq(destination.AsRegister<CpuRegister>(), source.AsRegister<CpuRegister>());
4066 } else if (source.IsRegister() && destination.IsStackSlot()) {
4067 Exchange32(source.AsRegister<CpuRegister>(), destination.GetStackIndex());
4068 } else if (source.IsStackSlot() && destination.IsRegister()) {
4069 Exchange32(destination.AsRegister<CpuRegister>(), source.GetStackIndex());
4070 } else if (source.IsStackSlot() && destination.IsStackSlot()) {
4071 Exchange32(destination.GetStackIndex(), source.GetStackIndex());
4072 } else if (source.IsRegister() && destination.IsDoubleStackSlot()) {
4073 Exchange64(source.AsRegister<CpuRegister>(), destination.GetStackIndex());
4074 } else if (source.IsDoubleStackSlot() && destination.IsRegister()) {
4075 Exchange64(destination.AsRegister<CpuRegister>(), source.GetStackIndex());
4076 } else if (source.IsDoubleStackSlot() && destination.IsDoubleStackSlot()) {
4077 Exchange64(destination.GetStackIndex(), source.GetStackIndex());
4078 } else if (source.IsFpuRegister() && destination.IsFpuRegister()) {
4080 __ movaps(source.AsFpuRegister<XmmRegister>(), destination.AsFpuRegister<XmmRegister>());
4081 __ movd(destination.AsFpuRegister<XmmRegister>(), CpuRegister(TMP));
4082 } else if (source.IsFpuRegister() && destination.IsStackSlot()) {
4083 Exchange32(source.AsFpuRegister<XmmRegister>(), destination.GetStackIndex());
4084 } else if (source.IsStackSlot() && destination.IsFpuRegister()) {
4085 Exchange32(destination.AsFpuRegister<XmmRegister>(), source.GetStackIndex());
4086 } else if (source.IsFpuRegister() && destination.IsDoubleStackSlot()) {
4087 Exchange64(source.AsFpuRegister<XmmRegister>(), destination.GetStackIndex());
4088 } else if (source.IsDoubleStackSlot() && destination.IsFpuRegister()) {
4089 Exchange64(destination.AsFpuRegister<XmmRegister>(), source.GetStackIndex());
4091 LOG(FATAL) << "Unimplemented swap between " << source << " and " << destination;
