Lines Matching full:instruction
437 const Instruction* inst = Instruction::At(code_item->insns_);
441 if (inst->Opcode() == Instruction::MONITOR_ENTER) {
493 const Instruction* inst = Instruction::At(code_item_->insns_ + dex_pc);
522 const Instruction* inst = Instruction::At(code_item_->insns_ + dex_pc);
523 const bool is_range = (inst->Opcode() == Instruction::INVOKE_VIRTUAL_RANGE_QUICK);
559 // Allocate and initialize an array to hold instruction data.
565 // Perform static instruction verification.
596 // If we fail again at runtime, mark that this instruction would throw and force this
600 // We need to save the work_line if the instruction wasn't throwing before. Otherwise we'll
603 // Note: this can fail before we touch any instruction, for the signature of a method. So
607 const Instruction* inst = Instruction::At(insns);
608 int opcode_flags = Instruction::FlagsOf(inst->Opcode());
610 if ((opcode_flags & Instruction::kThrow) == 0 && CurrentInsnFlags()->IsInTry()) {
665 const Instruction* inst = Instruction::At(insns);
671 Instruction::Code opcode = inst->Opcode();
673 case Instruction::APUT_OBJECT:
674 case Instruction::CHECK_CAST:
677 case Instruction::INVOKE_VIRTUAL:
678 case Instruction::INVOKE_VIRTUAL_RANGE:
679 case Instruction::INVOKE_INTERFACE:
680 case Instruction::INVOKE_INTERFACE_RANGE:
683 case Instruction::MONITOR_ENTER:
686 case Instruction::NEW_INSTANCE:
728 << "'try' block starts inside an instruction (" << start << ")";
732 const Instruction* inst = Instruction::At(code_item_->insns_ + dex_pc);
777 const Instruction* inst = Instruction::At(code_item_->insns_);
812 bool MethodVerifier::VerifyInstruction(const Instruction* inst, uint32_t code_offset) {
815 case Instruction::kVerifyRegA:
818 case Instruction::kVerifyRegAWide:
823 case Instruction::kVerifyRegB:
826 case Instruction::kVerifyRegBField:
829 case Instruction::kVerifyRegBMethod:
832 case Instruction::kVerifyRegBNewInstance:
835 case Instruction::kVerifyRegBString:
838 case Instruction::kVerifyRegBType:
841 case Instruction::kVerifyRegBWide:
846 case Instruction::kVerifyRegC:
849 case Instruction::kVerifyRegCField:
852 case Instruction::kVerifyRegCNewArray:
855 case Instruction::kVerifyRegCType:
858 case Instruction::kVerifyRegCWide:
863 case Instruction::kVerifyArrayData:
866 case Instruction::kVerifyBranchTarget:
869 case Instruction::kVerifySwitchTargets:
872 case Instruction::kVerifyVarArgNonZero:
874 case Instruction::kVerifyVarArg: {
877 if ((inst->GetVerifyExtraFlags() == Instruction::kVerifyVarArgNonZero && v_a == 0) ||
878 v_a > Instruction::kMaxVarArgRegs) {
884 uint32_t args[Instruction::kMaxVarArgRegs];
889 case Instruction::kVerifyVarArgRangeNonZero:
891 case Instruction::kVerifyVarArgRange:
892 if (inst->GetVerifyExtraFlags() == Instruction::kVerifyVarArgRangeNonZero &&
900 case Instruction::kVerifyError:
1083 case Instruction::GOTO:
1086 case Instruction::GOTO_32:
1090 case Instruction::GOTO_16:
1093 case Instruction::IF_EQ:
1094 case Instruction::IF_NE:
1095 case Instruction::IF_LT:
1096 case Instruction::IF_GE:
1097 case Instruction::IF_GT:
1098 case Instruction::IF_LE:
1099 case Instruction::IF_EQZ:
1100 case Instruction::IF_NEZ:
1101 case Instruction::IF_LTZ:
1102 case Instruction::IF_GEZ:
1103 case Instruction::IF_GTZ:
1104 case Instruction::IF_LEZ:
1137 if ((*insns & 0xff) == Instruction::PACKED_SWITCH) {
1141 expected_signature = Instruction::kPackedSwitchSignature;
1146 expected_signature = Instruction::kSparseSwitchSignature;
1277 const Instruction* inst = Instruction::At(code_item_->insns_);
1468 /* Begin by marking the first instruction as "changed". */
1493 // We carry the working set of registers from instruction to instruction. If this address can
1494 // be the target of a branch (or throw) instruction, or if we're skipping around chasing
1496 // Because we always prefer to continue on to the next instruction, we should never have a
1497 // situation where we have a stray "changed" flag set on an instruction that isn't a branch
1542 insn_idx += Instruction::At(code_item_->insns_ + insn_idx)->SizeInCodeUnits()) {
1547 if (insns[insn_idx] == Instruction::kPackedSwitchSignature ||
1548 insns[insn_idx] == Instruction::kSparseSwitchSignature ||
1549 insns[insn_idx] == Instruction::kArrayDataSignature ||
1550 (insns[insn_idx] == Instruction::NOP && (insn_idx + 1 < insns_size) &&
1551 (insns[insn_idx + 1] == Instruction::kPackedSwitchSignature ||
1552 insns[insn_idx + 1] == Instruction::kSparseSwitchSignature ||
1553 insns[insn_idx + 1] == Instruction::kArrayDataSignature))) {
1602 // We want the state _before_ the instruction, for the case where the dex pc we're
1603 // interested in is itself a monitor-enter instruction (which is a likely place
1613 * Once we finish decoding the instruction, we need to figure out where
1617 * (1) Continue to the next instruction. Applies to all but
1621 * (3) Exception handlers. Applies to any instruction that can
1625 instruction
1631 const Instruction* inst = Instruction::At(insns);
1632 int opcode_flags = Instruction::FlagsOf(inst->Opcode());
1643 * Make a copy of the previous register state. If the instruction
1649 if ((opcode_flags & Instruction::kThrow) != 0 && CurrentInsnFlags()->IsInTry()) {
1654 DCHECK(!have_pending_runtime_throw_failure_); // Per-instruction flag, should not be set here.
1658 // peephole pattern we compute a new line for either the fallthrough instruction or the
1664 case Instruction::NOP:
1671 Fail(VERIFY_ERROR_BAD_CLASS_HARD) << "encountered data table in instruction stream";
1675 case Instruction::MOVE:
1678 case Instruction::MOVE_FROM16:
1681 case Instruction::MOVE_16:
1684 case Instruction::MOVE_WIDE:
1687 case Instruction::MOVE_WIDE_FROM16:
1690 case Instruction::MOVE_WIDE_16:
1693 case Instruction::MOVE_OBJECT:
1696 case Instruction::MOVE_OBJECT_FROM16:
1699 case Instruction::MOVE_OBJECT_16:
1714 case Instruction::MOVE_RESULT:
1717 case Instruction::MOVE_RESULT_WIDE:
1720 case Instruction::MOVE_RESULT_OBJECT:
1724 case Instruction::MOVE_EXCEPTION: {
1725 // We do not allow MOVE_EXCEPTION as the first instruction in a method. This is a simple case
1732 * This statement can only appear as the first instruction in an exception handler. We verify
1739 case Instruction::RETURN_VOID:
1746 case Instruction::RETURN:
1771 case Instruction::RETURN_WIDE:
1787 case Instruction::RETURN_OBJECT:
1830 case Instruction::CONST_4: {
1836 case Instruction::CONST_16: {
1842 case Instruction::CONST: {
1848 case Instruction::CONST_HIGH16: {
1855 case Instruction::CONST_WIDE_16: {
1862 case Instruction::CONST_WIDE_32: {
1869 case Instruction::CONST_WIDE: {
1876 case Instruction::CONST_WIDE_HIGH16: {
1883 case Instruction::CONST_STRING:
1886 case Instruction::CONST_STRING_JUMBO:
1889 case Instruction::CONST_CLASS: {
1890 // Get type from instruction if unresolved then we need an access check
1899 case Instruction::MONITOR_ENTER:
1902 case Instruction::MONITOR_EXIT:
1906 * pointing to the following instruction. (This behavior goes back
1914 * failed on the -enter instruction, and the latter is impossible.
1923 opcode_flags &= ~Instruction::kThrow;
1927 case Instruction::CHECK_CAST:
1928 case Instruction::INSTANCE_OF: {
1930 * If this instruction succeeds, we will "downcast" register vA to the type in vB. (This
1936 const bool is_checkcast = (inst->Opcode() == Instruction::CHECK_CAST);
1979 case Instruction::ARRAY_LENGTH: {
1992 case Instruction::NEW_INSTANCE: {
2013 case Instruction::NEW_ARRAY:
2016 case Instruction::FILLED_NEW_ARRAY:
2020 case Instruction::FILLED_NEW_ARRAY_RANGE:
2024 case Instruction::CMPL_FLOAT:
2025 case Instruction::CMPG_FLOAT:
2034 case Instruction::CMPL_DOUBLE:
2035 case Instruction::CMPG_DOUBLE:
2046 case Instruction::CMP_LONG:
2057 case Instruction::THROW: {
2065 case Instruction::GOTO:
2066 case Instruction::GOTO_16:
2067 case Instruction::GOTO_32:
2071 case Instruction::PACKED_SWITCH:
2072 case Instruction::SPARSE_SWITCH:
2077 case Instruction::FILL_ARRAY_DATA: {
2095 if (array_data[0] != Instruction::kArrayDataSignature) {
2111 case Instruction::IF_EQ:
2112 case Instruction::IF_NE: {
2129 case Instruction::IF_LT:
2130 case Instruction::IF_GE:
2131 case Instruction::IF_GT:
2132 case Instruction::IF_LE: {
2141 case Instruction::IF_EQZ:
2142 case Instruction::IF_NEZ: {
2149 // Find previous instruction - its existence is a precondition to peephole optimization.
2157 "Unable to get previous instruction of if-eqz/if-nez for work index ",
2165 const Instruction* instance_of_inst = Instruction::At(code_item_->insns_ + instance_of_idx);
2180 (Instruction::INSTANCE_OF == instance_of_inst->Opcode()) &&
2203 if (inst->Opcode() == Instruction::IF_EQZ) {
2219 "Unable to get previous instruction of if-eqz/if-nez for work index ",
2223 const Instruction* move_inst = Instruction::At(code_item_->insns_ + move_idx);
2225 case Instruction::MOVE_OBJECT:
2230 case Instruction::MOVE_OBJECT_FROM16:
2235 case Instruction::MOVE_OBJECT_16:
2249 case Instruction::IF_LTZ:
2250 case Instruction::IF_GEZ:
2251 case Instruction::IF_GTZ:
2252 case Instruction::IF_LEZ: {
2260 case Instruction::AGET_BOOLEAN:
2263 case Instruction::AGET_BYTE:
2266 case Instruction::AGET_CHAR:
2269 case Instruction::AGET_SHORT:
2272 case Instruction::AGET:
2275 case Instruction::AGET_WIDE:
2278 case Instruction::AGET_OBJECT:
2282 case Instruction::APUT_BOOLEAN:
2285 case Instruction::APUT_BYTE:
2288 case Instruction::APUT_CHAR:
2291 case Instruction::APUT_SHORT:
2294 case Instruction::APUT:
2297 case Instruction::APUT_WIDE:
2300 case Instruction::APUT_OBJECT:
2304 case Instruction::IGET_BOOLEAN:
2307 case Instruction::IGET_BYTE:
2310 case Instruction::IGET_CHAR:
2313 case Instruction::IGET_SHORT:
2316 case Instruction::IGET:
2319 case Instruction::IGET_WIDE:
2322 case Instruction::IGET_OBJECT:
2327 case Instruction::IPUT_BOOLEAN:
2330 case Instruction::IPUT_BYTE:
2333 case Instruction::IPUT_CHAR:
2336 case Instruction::IPUT_SHORT:
2339 case Instruction::IPUT:
2342 case Instruction::IPUT_WIDE:
2345 case Instruction::IPUT_OBJECT:
2350 case Instruction::SGET_BOOLEAN:
2353 case Instruction::SGET_BYTE:
2356 case Instruction::SGET_CHAR:
2359 case Instruction::SGET_SHORT:
2362 case Instruction::SGET:
2365 case Instruction::SGET_WIDE:
2368 case Instruction::SGET_OBJECT:
2373 case Instruction::SPUT_BOOLEAN:
2376 case Instruction::SPUT_BYTE:
2379 case Instruction::SPUT_CHAR:
2382 case Instruction::SPUT_SHORT:
2385 case Instruction::SPUT:
2388 case Instruction::SPUT_WIDE:
2391 case Instruction::SPUT_OBJECT:
2396 case Instruction::INVOKE_VIRTUAL:
2397 case Instruction::INVOKE_VIRTUAL_RANGE:
2398 case Instruction::INVOKE_SUPER:
2399 case Instruction::INVOKE_SUPER_RANGE: {
2400 bool is_range = (inst->Opcode() == Instruction::INVOKE_VIRTUAL_RANGE ||
2401 inst->Opcode() == Instruction::INVOKE_SUPER_RANGE);
2402 bool is_super = (inst->Opcode() == Instruction::INVOKE_SUPER ||
2403 inst->Opcode() == Instruction::INVOKE_SUPER_RANGE);
2433 case Instruction::INVOKE_DIRECT:
2434 case Instruction::INVOKE_DIRECT_RANGE: {
2435 bool is_range = (inst->Opcode() == Instruction::INVOKE_DIRECT_RANGE);
2516 case Instruction::INVOKE_STATIC:
2517 case Instruction::INVOKE_STATIC_RANGE: {
2518 bool is_range = (inst->Opcode() == Instruction::INVOKE_STATIC_RANGE);
2541 case Instruction::INVOKE_INTERFACE:
2542 case Instruction::INVOKE_INTERFACE_RANGE: {
2543 bool is_range = (inst->Opcode() == Instruction::INVOKE_INTERFACE_RANGE);
2598 case Instruction::NEG_INT:
2599 case Instruction::NOT_INT:
2602 case Instruction::NEG_LONG:
2603 case Instruction::NOT_LONG:
2607 case Instruction::NEG_FLOAT:
2610 case Instruction::NEG_DOUBLE:
2614 case Instruction::INT_TO_LONG:
2618 case Instruction::INT_TO_FLOAT:
2621 case Instruction::INT_TO_DOUBLE:
2625 case Instruction::LONG_TO_INT:
2629 case Instruction::LONG_TO_FLOAT:
2633 case Instruction::LONG_TO_DOUBLE:
2637 case Instruction::FLOAT_TO_INT:
2640 case Instruction::FLOAT_TO_LONG:
2644 case Instruction::FLOAT_TO_DOUBLE:
2648 case Instruction::DOUBLE_TO_INT:
2652 case Instruction::DOUBLE_TO_LONG:
2656 case Instruction::DOUBLE_TO_FLOAT:
2660 case Instruction::INT_TO_BYTE:
2663 case Instruction::INT_TO_CHAR:
2666 case Instruction::INT_TO_SHORT:
2670 case Instruction::ADD_INT:
2671 case Instruction::SUB_INT:
2672 case Instruction::MUL_INT:
2673 case Instruction::REM_INT:
2674 case Instruction::DIV_INT:
2675 case Instruction::SHL_INT:
2676 case Instruction::SHR_INT:
2677 case Instruction::USHR_INT:
2681 case Instruction::AND_INT:
2682 case Instruction::OR_INT:
2683 case Instruction::XOR_INT:
2687 case Instruction::ADD_LONG:
2688 case Instruction::SUB_LONG:
2689 case Instruction::MUL_LONG:
2690 case Instruction::DIV_LONG:
2691 case Instruction::REM_LONG:
2692 case Instruction::AND_LONG:
2693 case Instruction::OR_LONG:
2694 case Instruction::XOR_LONG:
2699 case Instruction::SHL_LONG:
2700 case Instruction::SHR_LONG:
2701 case Instruction::USHR_LONG:
2706 case Instruction::ADD_FLOAT:
2707 case Instruction::SUB_FLOAT:
2708 case Instruction::MUL_FLOAT:
2709 case Instruction::DIV_FLOAT:
2710 case Instruction::REM_FLOAT:
2714 case Instruction::ADD_DOUBLE:
2715 case Instruction::SUB_DOUBLE:
2716 case Instruction::MUL_DOUBLE:
2717 case Instruction::DIV_DOUBLE:
2718 case Instruction::REM_DOUBLE:
2723 case Instruction::ADD_INT_2ADDR:
2724 case Instruction::SUB_INT_2ADDR:
2725 case Instruction::MUL_INT_2ADDR:
2726 case Instruction::REM_INT_2ADDR:
2727 case Instruction::SHL_INT_2ADDR:
2728 case Instruction::SHR_INT_2ADDR:
2729 case Instruction::USHR_INT_2ADDR:
2733 case Instruction::AND_INT_2ADDR:
2734 case Instruction::OR_INT_2ADDR:
2735 case Instruction::XOR_INT_2ADDR:
2739 case Instruction::DIV_INT_2ADDR:
2743 case Instruction::ADD_LONG_2ADDR:
2744 case Instruction::SUB_LONG_2ADDR:
2745 case Instruction::MUL_LONG_2ADDR:
2746 case Instruction::DIV_LONG_2ADDR:
2747 case Instruction::REM_LONG_2ADDR:
2748 case Instruction::AND_LONG_2ADDR:
2749 case Instruction::OR_LONG_2ADDR:
2750 case Instruction::XOR_LONG_2ADDR:
2755 case Instruction::SHL_LONG_2ADDR:
2756 case Instruction::SHR_LONG_2ADDR:
2757 case Instruction::USHR_LONG_2ADDR:
2761 case Instruction::ADD_FLOAT_2ADDR:
2762 case Instruction::SUB_FLOAT_2ADDR:
2763 case Instruction::MUL_FLOAT_2ADDR:
2764 case Instruction::DIV_FLOAT_2ADDR:
2765 case Instruction::REM_FLOAT_2ADDR:
2769 case Instruction::ADD_DOUBLE_2ADDR:
2770 case Instruction::SUB_DOUBLE_2ADDR:
2771 case Instruction::MUL_DOUBLE_2ADDR:
2772 case Instruction::DIV_DOUBLE_2ADDR:
2773 case Instruction::REM_DOUBLE_2ADDR:
2778 case Instruction::ADD_INT_LIT16:
2779 case Instruction::RSUB_INT_LIT16:
2780 case Instruction::MUL_INT_LIT16:
2781 case Instruction::DIV_INT_LIT16:
2782 case Instruction::REM_INT_LIT16:
2786 case Instruction::AND_INT_LIT16:
2787 case Instruction::OR_INT_LIT16:
2788 case Instruction::XOR_INT_LIT16:
2792 case Instruction::ADD_INT_LIT8:
2793 case Instruction::RSUB_INT_LIT8:
2794 case Instruction::MUL_INT_LIT8:
2795 case Instruction::DIV_INT_LIT8:
2796 case Instruction::REM_INT_LIT8:
2797 case Instruction::SHL_INT_LIT8:
2798 case Instruction::SHR_INT_LIT8:
2799 case Instruction::USHR_INT_LIT8:
2803 case Instruction::AND_INT_LIT8:
2804 case Instruction::OR_INT_LIT8:
2805 case Instruction::XOR_INT_LIT8:
2811 case Instruction::RETURN_VOID_NO_BARRIER:
2838 case Instruction::IGET_QUICK:
2841 case Instruction::IGET_WIDE_QUICK:
2844 case Instruction::IGET_OBJECT_QUICK:
2847 case Instruction::IGET_BOOLEAN_QUICK:
2850 case Instruction::IGET_BYTE_QUICK:
2853 case Instruction::IGET_CHAR_QUICK:
2856 case Instruction::IGET_SHORT_QUICK:
2859 case Instruction::IPUT_QUICK:
2862 case Instruction::IPUT_BOOLEAN_QUICK:
2865 case Instruction::IPUT_BYTE_QUICK:
2868 case Instruction::IPUT_CHAR_QUICK:
2871 case Instruction::IPUT_SHORT_QUICK:
2874 case Instruction::IPUT_WIDE_QUICK:
2877 case Instruction::IPUT_OBJECT_QUICK:
2880 case Instruction::INVOKE_VIRTUAL_QUICK:
2881 case Instruction::INVOKE_VIRTUAL_RANGE_QUICK: {
2882 bool is_range = (inst->Opcode() == Instruction::INVOKE_VIRTUAL_RANGE_QUICK);
2898 case Instruction::UNUSED_3E ... Instruction::UNUSED_43:
2899 case Instruction::UNUSED_F3 ... Instruction::UNUSED_FF:
2900 case Instruction::UNUSED_79:
2901 case Instruction::UNUSED_7A:
2907 * complain if an instruction is missing (which is desirable).
2930 opcode_flags = Instruction::kThrow;
2933 // instruction.
2950 * NOTE: instructions like Instruction::EQZ provide information about the
2959 if ((opcode_flags & Instruction::kBranch) != 0) {
2966 DCHECK_EQ(isConditional, (opcode_flags & Instruction::kContinue) != 0);
2988 if ((opcode_flags & Instruction::kSwitch) != 0) {
2994 if ((*insns & 0xff) == Instruction::PACKED_SWITCH) {
2999 DCHECK((*insns & 0xff) == Instruction::SPARSE_SWITCH);
3026 if ((opcode_flags & Instruction::kThrow) != 0 && insn_flags_[work_insn_idx_].IsInTry()) {
3053 * "work_regs", because at runtime the exception will be thrown before the instruction
3063 * instruction. This does apply to monitor-exit because of async exception handling.
3067 * The state in work_line reflects the post-execution state. If the current instruction is a
3071 if (inst->Opcode() != Instruction::MONITOR_ENTER || work_line_->MonitorStackDepth() != 1) {
3073 << "expected to be within a catch-all for an instruction where a monitor is held";
3079 /* Handle "continue". Tag the next consecutive instruction.
3084 if ((opcode_flags & Instruction::kContinue) != 0) {
3085 DCHECK_EQ(Instruction::At(code_item_->insns_ + work_insn_idx_), inst);
3091 // The only way to get to a move-exception instruction is to get thrown there. Make sure the
3092 // next instruction isn't one.
3102 const Instruction* ret_inst = Instruction::At(code_item_->insns_ + next_insn_idx);
3103 Instruction::Code opcode = ret_inst->Opcode();
3104 if (opcode == Instruction::RETURN_VOID || opcode == Instruction::RETURN_VOID_NO_BARRIER) {
3107 if (opcode == Instruction::RETURN_WIDE) {
3116 // Merge registers into what we have for the next instruction, and set the "changed" flag if
3124 * We're not recording register data for the next instruction, so we don't know what the
3132 if ((opcode_flags & Instruction::kReturn) != 0) {
3139 * Update start_guess. Advance to the next instruction of that's
3144 if ((opcode_flags & Instruction::kContinue) != 0) {
3145 DCHECK_EQ(Instruction::At(code_item_->insns_ + work_insn_idx_), inst);
3147 } else if ((opcode_flags & Instruction::kBranch) != 0) {
3314 // See if the method type implied by the invoke instruction matches the access flags for the
3329 T* it, const Instruction* inst, MethodType method_type, bool is_range, ArtMethod* res_method) {
3444 void MethodVerifier::VerifyInvocationArgsUnresolvedMethod(const Instruction* inst,
3484 const Instruction* inst, MethodType method_type, bool is_range, bool is_super) {
3526 ArtMethod* MethodVerifier::GetQuickInvokedMethod(const Instruction* inst, RegisterLine* reg_line,
3529 DCHECK_EQ(inst->Opcode(), Instruction::INVOKE_VIRTUAL_RANGE_QUICK);
3531 DCHECK_EQ(inst->Opcode(), Instruction::INVOKE_VIRTUAL_QUICK);
3574 ArtMethod* MethodVerifier::VerifyInvokeVirtualQuickArgs(const Instruction* inst, bool is_range) {
3671 void MethodVerifier::VerifyNewArray(const Instruction* inst, bool is_filled, bool is_range) {
3674 DCHECK_EQ(inst->Opcode(), Instruction::NEW_ARRAY);
3677 DCHECK_EQ(inst->Opcode(), Instruction::FILLED_NEW_ARRAY);
3680 DCHECK_EQ(inst->Opcode(), Instruction::FILLED_NEW_ARRAY_RANGE);
3719 void MethodVerifier::VerifyAGet(const Instruction* inst,
3729 // instruction type. TODO: have a proper notion of bottom here.
3757 // instruction, which can't differentiate object types and ints from floats, longs from
3821 void MethodVerifier::VerifyAPut(const Instruction* inst,
3830 // Still check that the given value matches the instruction's type.
3831 // Note: this is, as usual, complicated by the fact the the instruction isn't fully typed
3861 // The instruction agrees with the type of array, confirm the value to be stored does too
3862 // Note: we use the instruction type (rather than the component type) for aput-object as
3974 void MethodVerifier::VerifyISFieldAccess(const Instruction* inst, const RegType& insn_type,
4079 ArtField* MethodVerifier::GetQuickFieldAccess(const Instruction* inst,
4098 void MethodVerifier::VerifyQuickFieldAccess(const Instruction* inst, const RegType& insn_type,
4228 if ((insns[insn_idx] & 0xff) == Instruction::MOVE_EXCEPTION) {
4236 if (((insns[insn_idx] & 0xff) >= Instruction::MOVE_RESULT) &&
4237 ((insns[insn_idx] & 0xff) <= Instruction::MOVE_RESULT_OBJECT)) {
4254 * We haven't processed this instruction before, and we haven't touched the registers here, so
4267 const Instruction* ret_inst = Instruction::At(code_item_->insns_ + next_insn);
4268 Instruction::Code opcode = ret_inst->Opcode();
4269 if (opcode == Instruction::RETURN_VOID || opcode == Instruction::RETURN_VOID_NO_BARRIER) {
4277 if (opcode == Instruction::RETURN_WIDE) {
