Lines Matching refs:u4_cntrl
289 UWORD32 u4_cntrl,
336 u4_dc_cntrl = (~(u4_cntrl >> 16) & u4_dc_cntrl);
338 u4_cntrl = (u4_cntrl & CNTRL_FLAG_AC_MASK_LUMA)
353 u4_blk_cntrl = (u4_cntrl & CNTRL_FLAG_AC_MASK_LUMA);
354 u4_dc_cntrl = (u4_cntrl & CNTRL_FLAG_DC_MASK_LUMA) << 16;
616 UWORD32 u4_cntrl,
649 if (u4_cntrl & CNTRL_FLAG_DCBLK_MASK_CHROMA)
667 u4_dc_cntrl = (~(u4_cntrl >> 16) & u4_dc_cntrl);
669 u4_cntrl = (u4_cntrl & CNTRL_FLAG_AC_MASK_CHROMA)
678 u4_cntrl = u4_cntrl & CNTRL_FLAG_AC_MASK_CHROMA;
684 u4_blk_cntrl = (u4_cntrl & CNTRL_FLAG_AC_MASK_CHROMA);
685 u4_dc_cntrl = (u4_cntrl & CNTRL_FLAG_DC_MASK_CHROMA) << 16;
818 UWORD32 coeff_cnt, mask, b4,u4_cntrl=0;
831 u4_cntrl = 0;
852 u4_cntrl = 0x00008000;// Set DC bit in ctrl code
906 u4_cntrl |= (1 << (31 - u1_scan_order[b4]));
921 (*pu4_cntrl) = u4_cntrl;
1000 UWORD32 u4_mb_coeff_cost = 0, u4_b8_coeff_cost = 0, coeff_cnt, mask, u4_cntrl = 0, b4, b8;
1078 u4_cntrl |= (1 << (dcac_block - u1_scan_order[b4]));
1104 u4_cntrl = u4_cntrl & (~cntrl_mask_map[(b4 >> 2)]);
1134 u4_cntrl = 0;
1138 (*pu4_cntrl) = u4_cntrl;
1517 UWORD32 u4_cntrl;
1560 pu1_nnz, &u4_cntrl);
1574 u4_cntrl &= 0x111F8000;
1577 if (u4_cntrl)
1584 u4_cntrl, ENABLE_DC_TRANSFORM,
2035 UWORD32 u4_cntrl;
2071 au1_nnz, ps_codec->u4_thres_resi, &u4_cntrl, u4_swap_uv);
2085 u4_cntrl,
2141 UWORD32 u4_cntrl;
2193 pu1_nnz, ps_codec->u4_thres_resi, &u4_cntrl);
2198 u4_cntrl = 0;
2214 u4_cntrl &= 0x111F0000;
2217 if (u4_cntrl)
2224 u4_cntrl /*Cntrl*/, DISABLE_DC_TRANSFORM,
2288 UWORD32 u4_cntrl;
2326 au1_nnz, ps_codec->u4_thres_resi, &u4_cntrl, u4_swap_uv);
2341 u4_cntrl &= 0x7700C000;
2344 if (u4_cntrl)
2351 u4_cntrl, ps_proc->pv_scratch_buff);
