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Lines Matching defs:tiling

169 	 * Current tiling mode
292 /* 965+ just need multiples of page size for tiling */
321 * Round a given pitch up to the minimum required for X tiling on a
322 * given chip. We use 512 as the minimum to allow for a later tiling
528 /* The older chipsets are far-less flexible in terms of tiling,
820 uint32_t tiling;
825 tiling = *tiling_mode;
841 if ((bufmgr_gem->gen == 2) && tiling != I915_TILING_NONE)
843 else if (tiling == I915_TILING_X
845 && tiling == I915_TILING_Y))
847 else if (tiling == I915_TILING_Y)
855 } while (*tiling_mode != tiling);
858 if (tiling == I915_TILING_NONE)
862 tiling, stride);
879 /* Tiling with userptr surfaces is not supported
2599 /* Tiling with userptr surfaces is not supported