Lines Matching refs:dbg
196 #define DBG_OFFSET(reg) ((LLVM_EXTENSION offsetof (RegisterContextDarwin_arm::DBG, reg) + sizeof (RegisterContextDarwin_arm::GPR) + sizeof (RegisterContextDarwin_arm::FPU) + sizeof (RegisterContextDarwin_arm::EXC)))
198 #define DEFINE_DBG(reg, i) #reg, NULL, sizeof(((RegisterContextDarwin_arm::DBG *)NULL)->reg[i]), DBG_OFFSET(reg[i]), eEncodingUint, eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, dbg_##reg##i }, NULL, NULL
529 SetError(set, Read, DoReadDBG(GetThreadID(), set, dbg));
585 SetError (set, Write, DoWriteDBG(GetThreadID(), set, dbg));
624 RegisterContextDarwin_arm::LogDBGRegisters (Log *log, const DBG& dbg)
630 i, i, dbg.bvr[i], dbg.bcr[i],
631 i, i, dbg.wvr[i], dbg.wcr[i]);
1016 if ((dbg.bcr[i] & BCR_ENABLE) == 0)
1024 dbg.bvr[i] = addr & ~((lldb::addr_t)3);
1032 dbg.bcr[i] = BCR_M_IMVA_MATCH | // Stop on address mismatch
1041 // dbg.bvr[i],
1042 // dbg.bcr[i]);
1047 dbg.bcr[i] = BCR_M_IMVA_MATCH | // Stop on address mismatch
1056 // dbg.bvr[i],
1057 // dbg.bcr[i]);
1085 dbg.bcr[hw_index] = 0;
1089 // dbg.bvr[hw_index],
1091 // dbg.bcr[hw_index]);
1168 if ((dbg.wcr[i] & WCR_ENABLE) == 0)
1178 dbg.wvr[i] = addr & ~((lldb::addr_t)3);
1179 dbg.wcr[i] = byte_address_select | // Which bytes that follow the IMVA that we will watch
1209 dbg.wcr[hw_index] = 0;
1213 // dbg.wvr[hw_index],
1215 // dbg.wcr[hw_index]);
