Lines Matching refs:__mmst_reg
375 m_state.context.fpu.avx.__fpu_stmm0.__mmst_reg[i] = 'a';
376 m_state.context.fpu.avx.__fpu_stmm1.__mmst_reg[i] = 'b';
377 m_state.context.fpu.avx.__fpu_stmm2.__mmst_reg[i] = 'c';
378 m_state.context.fpu.avx.__fpu_stmm3.__mmst_reg[i] = 'd';
379 m_state.context.fpu.avx.__fpu_stmm4.__mmst_reg[i] = 'e';
380 m_state.context.fpu.avx.__fpu_stmm5.__mmst_reg[i] = 'f';
381 m_state.context.fpu.avx.__fpu_stmm6.__mmst_reg[i] = 'g';
382 m_state.context.fpu.avx.__fpu_stmm7.__mmst_reg[i] = 'h';
386 m_state.context.fpu.avx.__fpu_stmm0.__mmst_reg[i] = INT8_MIN;
387 m_state.context.fpu.avx.__fpu_stmm1.__mmst_reg[i] = INT8_MIN;
388 m_state.context.fpu.avx.__fpu_stmm2.__mmst_reg[i] = INT8_MIN;
389 m_state.context.fpu.avx.__fpu_stmm3.__mmst_reg[i] = INT8_MIN;
390 m_state.context.fpu.avx.__fpu_stmm4.__mmst_reg[i] = INT8_MIN;
391 m_state.context.fpu.avx.__fpu_stmm5.__mmst_reg[i] = INT8_MIN;
392 m_state.context.fpu.avx.__fpu_stmm6.__mmst_reg[i] = INT8_MIN;
393 m_state.context.fpu.avx.__fpu_stmm7.__mmst_reg[i] = INT8_MIN;
445 m_state.context.fpu.no_avx.__fpu_stmm0.__mmst_reg[i] = 'a';
446 m_state.context.fpu.no_avx.__fpu_stmm1.__mmst_reg[i] = 'b';
447 m_state.context.fpu.no_avx.__fpu_stmm2.__mmst_reg[i] = 'c';
448 m_state.context.fpu.no_avx.__fpu_stmm3.__mmst_reg[i] = 'd';
449 m_state.context.fpu.no_avx.__fpu_stmm4.__mmst_reg[i] = 'e';
450 m_state.context.fpu.no_avx.__fpu_stmm5.__mmst_reg[i] = 'f';
451 m_state.context.fpu.no_avx.__fpu_stmm6.__mmst_reg[i] = 'g';
452 m_state.context.fpu.no_avx.__fpu_stmm7.__mmst_reg[i] = 'h';
456 m_state.context.fpu.no_avx.__fpu_stmm0.__mmst_reg[i] = INT8_MIN;
457 m_state.context.fpu.no_avx.__fpu_stmm1.__mmst_reg[i] = INT8_MIN;
458 m_state.context.fpu.no_avx.__fpu_stmm2.__mmst_reg[i] = INT8_MIN;
459 m_state.context.fpu.no_avx.__fpu_stmm3.__mmst_reg[i] = INT8_MIN;
460 m_state.context.fpu.no_avx.__fpu_stmm4.__mmst_reg[i] = INT8_MIN;
461 m_state.context.fpu.no_avx.__fpu_stmm5.__mmst_reg[i] = INT8_MIN;
462 m_state.context.fpu.no_avx.__fpu_stmm6.__mmst_reg[i] = INT8_MIN;
463 m_state.context.fpu.no_avx.__fpu_stmm7.__mmst_reg[i] = INT8_MIN;
1026 #define FPU_SIZE_MMST(reg) (sizeof(((DNBArchImplI386::FPU *)NULL)->__fpu_##reg.__mmst_reg))
1329 case fpu_stmm0: memcpy(&value->value.uint8, m_state.context.fpu.avx.__fpu_stmm0.__mmst_reg, 10); return true;
1330 case fpu_stmm1: memcpy(&value->value.uint8, m_state.context.fpu.avx.__fpu_stmm1.__mmst_reg, 10); return true;
1331 case fpu_stmm2: memcpy(&value->value.uint8, m_state.context.fpu.avx.__fpu_stmm2.__mmst_reg, 10); return true;
1332 case fpu_stmm3: memcpy(&value->value.uint8, m_state.context.fpu.avx.__fpu_stmm3.__mmst_reg, 10); return true;
1333 case fpu_stmm4: memcpy(&value->value.uint8, m_state.context.fpu.avx.__fpu_stmm4.__mmst_reg, 10); return true;
1334 case fpu_stmm5: memcpy(&value->value.uint8, m_state.context.fpu.avx.__fpu_stmm5.__mmst_reg, 10); return true;
1335 case fpu_stmm6: memcpy(&value->value.uint8, m_state.context.fpu.avx.__fpu_stmm6.__mmst_reg, 10); return true;
1336 case fpu_stmm7: memcpy(&value->value.uint8, m_state.context.fpu.avx.__fpu_stmm7.__mmst_reg, 10); return true;
1376 case fpu_stmm0: memcpy(&value->value.uint8, m_state.context.fpu.no_avx.__fpu_stmm0.__mmst_reg, 10); return true;
1377 case fpu_stmm1: memcpy(&value->value.uint8, m_state.context.fpu.no_avx.__fpu_stmm1.__mmst_reg, 10); return true;
1378 case fpu_stmm2: memcpy(&value->value.uint8, m_state.context.fpu.no_avx.__fpu_stmm2.__mmst_reg, 10); return true;
1379 case fpu_stmm3: memcpy(&value->value.uint8, m_state.context.fpu.no_avx.__fpu_stmm3.__mmst_reg, 10); return true;
1380 case fpu_stmm4: memcpy(&value->value.uint8, m_state.context.fpu.no_avx.__fpu_stmm4.__mmst_reg, 10); return true;
1381 case fpu_stmm5: memcpy(&value->value.uint8, m_state.context.fpu.no_avx.__fpu_stmm5.__mmst_reg, 10); return true;
1382 case fpu_stmm6: memcpy(&value->value.uint8, m_state.context.fpu.no_avx.__fpu_stmm6.__mmst_reg, 10); return true;
1383 case fpu_stmm7: memcpy(&value->value.uint8, m_state.context.fpu.no_avx.__fpu_stmm7.__mmst_reg, 10); return true;
1476 case fpu_stmm0: memcpy (m_state.context.fpu.avx.__fpu_stmm0.__mmst_reg, &value->value.uint8, 10); success = true; break;
1477 case fpu_stmm1: memcpy (m_state.context.fpu.avx.__fpu_stmm1.__mmst_reg, &value->value.uint8, 10); success = true; break;
1478 case fpu_stmm2: memcpy (m_state.context.fpu.avx.__fpu_stmm2.__mmst_reg, &value->value.uint8, 10); success = true; break;
1479 case fpu_stmm3: memcpy (m_state.context.fpu.avx.__fpu_stmm3.__mmst_reg, &value->value.uint8, 10); success = true; break;
1480 case fpu_stmm4: memcpy (m_state.context.fpu.avx.__fpu_stmm4.__mmst_reg, &value->value.uint8, 10); success = true; break;
1481 case fpu_stmm5: memcpy (m_state.context.fpu.avx.__fpu_stmm5.__mmst_reg, &value->value.uint8, 10); success = true; break;
1482 case fpu_stmm6: memcpy (m_state.context.fpu.avx.__fpu_stmm6.__mmst_reg, &value->value.uint8, 10); success = true; break;
1483 case fpu_stmm7: memcpy (m_state.context.fpu.avx.__fpu_stmm7.__mmst_reg, &value->value.uint8, 10); success = true; break;
1523 case fpu_stmm0: memcpy (m_state.context.fpu.no_avx.__fpu_stmm0.__mmst_reg, &value->value.uint8, 10); success = true; break;
1524 case fpu_stmm1: memcpy (m_state.context.fpu.no_avx.__fpu_stmm1.__mmst_reg, &value->value.uint8, 10); success = true; break;
1525 case fpu_stmm2: memcpy (m_state.context.fpu.no_avx.__fpu_stmm2.__mmst_reg, &value->value.uint8, 10); success = true; break;
1526 case fpu_stmm3: memcpy (m_state.context.fpu.no_avx.__fpu_stmm3.__mmst_reg, &value->value.uint8, 10); success = true; break;
1527 case fpu_stmm4: memcpy (m_state.context.fpu.no_avx.__fpu_stmm4.__mmst_reg, &value->value.uint8, 10); success = true; break;
1528 case fpu_stmm5: memcpy (m_state.context.fpu.no_avx.__fpu_stmm5.__mmst_reg, &value->value.uint8, 10); success = true; break;
1529 case fpu_stmm6: memcpy (m_state.context.fpu.no_avx.__fpu_stmm6.__mmst_reg, &value->value.uint8, 10); success = true; break;
1530 case fpu_stmm7: memcpy (m_state.context.fpu.no_avx.__fpu_stmm7.__mmst_reg, &value->value.uint8, 10); success = true; break;
