Lines Matching refs:__mmst_reg
284 m_state.context.fpu.avx.__fpu_stmm0.__mmst_reg[i] = 'a';
285 m_state.context.fpu.avx.__fpu_stmm1.__mmst_reg[i] = 'b';
286 m_state.context.fpu.avx.__fpu_stmm2.__mmst_reg[i] = 'c';
287 m_state.context.fpu.avx.__fpu_stmm3.__mmst_reg[i] = 'd';
288 m_state.context.fpu.avx.__fpu_stmm4.__mmst_reg[i] = 'e';
289 m_state.context.fpu.avx.__fpu_stmm5.__mmst_reg[i] = 'f';
290 m_state.context.fpu.avx.__fpu_stmm6.__mmst_reg[i] = 'g';
291 m_state.context.fpu.avx.__fpu_stmm7.__mmst_reg[i] = 'h';
295 m_state.context.fpu.avx.__fpu_stmm0.__mmst_reg[i] = INT8_MIN;
296 m_state.context.fpu.avx.__fpu_stmm1.__mmst_reg[i] = INT8_MIN;
297 m_state.context.fpu.avx.__fpu_stmm2.__mmst_reg[i] = INT8_MIN;
298 m_state.context.fpu.avx.__fpu_stmm3.__mmst_reg[i] = INT8_MIN;
299 m_state.context.fpu.avx.__fpu_stmm4.__mmst_reg[i] = INT8_MIN;
300 m_state.context.fpu.avx.__fpu_stmm5.__mmst_reg[i] = INT8_MIN;
301 m_state.context.fpu.avx.__fpu_stmm6.__mmst_reg[i] = INT8_MIN;
302 m_state.context.fpu.avx.__fpu_stmm7.__mmst_reg[i] = INT8_MIN;
368 m_state.context.fpu.no_avx.__fpu_stmm0.__mmst_reg[i] = 'a';
369 m_state.context.fpu.no_avx.__fpu_stmm1.__mmst_reg[i] = 'b';
370 m_state.context.fpu.no_avx.__fpu_stmm2.__mmst_reg[i] = 'c';
371 m_state.context.fpu.no_avx.__fpu_stmm3.__mmst_reg[i] = 'd';
372 m_state.context.fpu.no_avx.__fpu_stmm4.__mmst_reg[i] = 'e';
373 m_state.context.fpu.no_avx.__fpu_stmm5.__mmst_reg[i] = 'f';
374 m_state.context.fpu.no_avx.__fpu_stmm6.__mmst_reg[i] = 'g';
375 m_state.context.fpu.no_avx.__fpu_stmm7.__mmst_reg[i] = 'h';
379 m_state.context.fpu.no_avx.__fpu_stmm0.__mmst_reg[i] = INT8_MIN;
380 m_state.context.fpu.no_avx.__fpu_stmm1.__mmst_reg[i] = INT8_MIN;
381 m_state.context.fpu.no_avx.__fpu_stmm2.__mmst_reg[i] = INT8_MIN;
382 m_state.context.fpu.no_avx.__fpu_stmm3.__mmst_reg[i] = INT8_MIN;
383 m_state.context.fpu.no_avx.__fpu_stmm4.__mmst_reg[i] = INT8_MIN;
384 m_state.context.fpu.no_avx.__fpu_stmm5.__mmst_reg[i] = INT8_MIN;
385 m_state.context.fpu.no_avx.__fpu_stmm6.__mmst_reg[i] = INT8_MIN;
386 m_state.context.fpu.no_avx.__fpu_stmm7.__mmst_reg[i] = INT8_MIN;
1269 #define FPU_SIZE_MMST(reg) (sizeof(((DNBArchImplX86_64::FPU *)NULL)->__fpu_##reg.__mmst_reg))
