Lines Matching full:acyclic
1113 /// The acyclic critical path is four cycles: a->b->c->d->exit
2186 // acyclic latency during PostRA, and highly out-of-order processors will
2440 /// Set IsAcyclicLatencyLimited if the acyclic path is longer than the cyclic
2457 // Scaled acyclic critical path.
2474 dbgs() << " ACYCLIC LATENCY LIMIT\n");
2627 // For loops that are acyclic path limited, aggressively schedule for latency.
2674 // For acyclic path limited loops, latency was already checked above.
