Lines Matching full:spill
57 // | including spill slots |
663 // right thing for the emergency spill slot.
731 assert((Count & 1) == 0 && "Odd number of callee-saved regs to spill!");
749 assert((Count & 1) == 0 && "Odd number of callee-saved regs to spill!");
750 assert((i & 1) == 0 && "Odd index for callee-saved reg spill!");
752 // first spill is a pre-increment that allocates the stack.
763 // For first spill use pre-increment store.
771 spill use pre-increment store.
778 DEBUG(dbgs() << "CSR spill: (" << TRI->getName(Reg1) << ", "
809 assert((Count & 1) == 0 && "Odd number of callee-saved regs to spill!");
831 assert((Count & 1) == 0 && "Odd number of callee-saved regs to spill!");
832 assert((i & 1) == 0 && "Odd index for callee-saved reg spill!");
886 // Spill the BasePtr if it's used. Do this first thing so that the
934 // Find out which register is the additional spill.
949 // emergency spill slot for the register scavenger.
962 // range. We'll end up allocating an unnecessary spill slot a lot, but
964 // The CSR spill slots have not been allocated yet, so estimateStackSize
975 // to materialize a stack offset. If so, either spill one additional
976 // callee-saved register or reserve a special spill slot to facilitate
982 // If we're adding a register to spill here, we have to add two of them
983 // to keep the number of regs to spill even.
996 // If we didn't find an extra callee-saved register to spill, create
997 // an emergency spill slot.
1003 << " as the emergency spill slot.\n");
