Lines Matching full:writeres
57 def : WriteRes<WriteImm, [A53UnitALU]> { let Latency = 3; }
58 def : WriteRes<WriteI, [A53UnitALU]> { let Latency = 3; }
59 def : WriteRes<WriteISReg, [A53UnitALU]> { let Latency = 3; }
60 def : WriteRes<WriteIEReg, [A53UnitALU]> { let Latency = 3; }
61 def : WriteRes<WriteIS, [A53UnitALU]> { let Latency = 2; }
62 def : WriteRes<WriteExtr, [A53UnitALU]> { let Latency = 3; }
65 def : WriteRes<WriteIM32, [A53UnitMAC]> { let Latency = 4; }
66 def : WriteRes<WriteIM64, [A53UnitMAC]> { let Latency = 4; }
69 def : WriteRes<WriteID32, [A53UnitDiv]> { let Latency = 4; }
70 def : WriteRes<WriteID64, [A53UnitDiv]> { let Latency = 4; }
73 def : WriteRes<WriteLD, [A53UnitLdSt]> { let Latency = 4; }
74 def : WriteRes<WriteLDIdx, [A53UnitLdSt]> { let Latency = 4; }
75 def : WriteRes<WriteLDHi, [A53UnitLdSt]> { let Latency = 4; }
81 def : WriteRes<WriteVLD, [A53UnitLdSt]> { let Latency = 6;
95 def : WriteRes<WriteAdr, []> { let Latency = 0; }
98 def : WriteRes<WriteST, [A53UnitLdSt]> { let Latency = 4; }
99 def : WriteRes<WriteSTP, [A53UnitLdSt]> { let Latency = 4; }
100 def : WriteRes<WriteSTIdx, [A53UnitLdSt]> { let Latency = 4; }
101 def : WriteRes<WriteSTX, [A53UnitLdSt]> { let Latency = 4; }
104 def : WriteRes<WriteVST, [A53UnitLdSt]> { let Latency = 5;
113 def : WriteRes<WriteBr, [A53UnitB]>;
114 def : WriteRes<WriteBrReg, [A53UnitB]>;
115 def : WriteRes<WriteSys, [A53UnitB]>;
116 def : WriteRes<WriteBarrier, [A53UnitB]>;
117 def : WriteRes<WriteHint, [A53UnitB]>;
120 def : WriteRes<WriteF, [A53UnitFPALU]> { let Latency = 6; }
121 def : WriteRes<WriteFCmp, [A53UnitFPALU]> { let Latency = 6; }
122 def : WriteRes<WriteFCvt, [A53UnitFPALU]> { let Latency = 6; }
123 def : WriteRes<WriteFCopy, [A53UnitFPALU]> { let Latency = 6; }
124 def : WriteRes<WriteFImm, [A53UnitFPALU]> { let Latency = 6; }
125 def : WriteRes<WriteV, [A53UnitFPALU]> { let Latency = 6; }
128 def : WriteRes<WriteFMul, [A53UnitFPMDS]> { let Latency = 6; }
129 def : WriteRes<WriteFDiv, [A53UnitFPMDS]> { let Latency = 33;
