Lines Matching full:b00
1656 : NLdSt<0,0b00,0b0111,op7_4, (outs), (ins AddrMode:$Rn, VecListOneD:$Vd),
1663 : NLdSt<0,0b00,0b1010,op7_4, (outs), (ins AddrMode:$Rn, VecListDPair:$Vd),
1682 def _fixed : NLdSt<0,0b00, 0b0111,op7_4, (outs GPR:$wb),
1690 def _register : NLdSt<0,0b00,0b0111,op7_4, (outs GPR:$wb),
1700 def _fixed : NLdSt<0,0b00,0b1010,op7_4, (outs GPR:$wb),
1708 def _register : NLdSt<0,0b00,0b1010,op7_4, (outs GPR:$wb),
1730 : NLdSt<0, 0b00, 0b0110, op7_4, (outs),
1738 def _fixed : NLdSt<0,0b00,0b0110,op7_4, (outs GPR:$wb),
1746 def _register : NLdSt<0,0b00,0b0110,op7_4, (outs GPR:$wb),
1772 : NLdSt<0, 0b00, 0b0010, op7_4, (outs),
1781 def _fixed : NLdSt<0,0b00,0b0010,op7_4, (outs GPR:$wb),
1789 def _register : NLdSt<0,0b00,0b0010,op7_4, (outs GPR:$wb),
1816 : NLdSt<0, 0b00, op11_8, op7_4, (outs), (ins AddrMode:$Rn, VdTy:$Vd),
1844 def _fixed : NLdSt<0, 0b00, op11_8, op7_4, (outs GPR:$wb),
1852 def _register : NLdSt<0, 0b00, op11_8, op7_4, (outs GPR:$wb),
1861 def _fixed : NLdSt<0, 0b00, 0b0011, op7_4, (outs GPR:$wb),
1869 def _register : NLdSt<0, 0b00, 0b0011, op7_4, (outs GPR:$wb),
1913 : NLdSt<0, 0b00, op11_8, op7_4, (outs),
1931 : NLdSt<0, 0b00, op11_8, op7_4, (outs GPR:$wb),
1971 : NLdSt<0, 0b00, op11_8, op7_4, (outs),
1990 : NLdSt<0, 0b00, op11_8, op7_4, (outs GPR:$wb),
2057 : NLdStLn<1, 0b00, op11_8, op7_4, (outs),
2098 : NLdStLn<1, 0b00, op11_8, op7_4, (outs GPR:$wb),
2136 : NLdStLn<1, 0b00, op11_8, op7_4, (outs),
2174 : NLdStLn<1, 0b00, op11_8, op7_4, (outs GPR:$wb),
2209 : NLdStLn<1, 0b00, op11_8, op7_4, (outs),
2244 : NLdStLn<1, 0b00, op11_8, op7_4, (outs GPR:$wb),
2279 : NLdStLn<1, 0b00, op11_8, op7_4, (outs),
2318 : NLdStLn<1, 0b00, op11_8, op7_4, (outs GPR:$wb),
3235 def v8i8 : N2V<op24_23, op21_20, 0b00, op17_16, op11_7, 0, op4,
3255 def v16i8 : N2V<op24_23, op21_20, 0b00, op17_16, op11_7, 1, op4,
3283 def v8i8 : N2VDInt<op24_23, op21_20, 0b00, op17_16, op11_7, op4,
3291 def v16i8 : N2VQInt<op24_23, op21_20, 0b00, op17_16, op11_7, op4,
3306 def v8i8 : N2VN<op24_23, op21_20, 0b00, op17_16, op11_7, op6, op4,
3323 def v8i8 : N2VNInt<op24_23, op21_20, 0b00, op17_16, op11_7, op6, op4,
3339 def v8i16 : N2VL<op24_23, 0b00, 0b10, 0b00, op11_7, op6, op4, IIC_VQUNAiD,
3341 def v4i32 : N2VL<op24_23, 0b01, 0b00, 0b00, op11_7, op6, op4, IIC_VQUNAiD,
3343 def v2i64 : N2VL<op24_23, 0b10, 0b00, 0b00, op11_7, op6, op4, IIC_VQUNAiD,
3357 def v8i8 : N3VD<op24, op23, 0b00, op11_8, op4, itinD16,
3368 def v16i8 : N3VQ<op24, op23, 0b00, op11_8, op4, itinQ16,
3471 def v8i8 : N3VDInt<op24, op23, 0b00, op11_8, op4, f, itinD16,
3474 def v16i8 : N3VQInt<op24, op23, 0b00, op11_8, op4, f, itinQ16,
3485 def v8i8 : N3VDIntSh<op24, op23, 0b00, op11_8, op4, f, itinD16,
3488 def v16i8 : N3VQIntSh<op24, op23, 0b00, op11_8, op4, f, itinQ16,
3529 def v8i8 : N3VNInt<op24, op23, 0b00, op11_8, op4,
3547 def v8i16 : N3VL<op24, op23, 0b00, op11_8, op4, itin16,
3571 def v8i16 : N3VLExt<op24, op23, 0b00, op11_8, op4, itin16,
3613 def v8i16 : N3VLInt<op24, op23, 0b00, op11_8, op4, itin16,
3622 def v8i16 : N3VLIntExt<op24, op23, 0b00, op11_8, op4, itin,
3639 def v8i16 : N3VW<op24, op23, 0b00, op11_8, op4,
3658 def v8i8 : N3VDMulOp<op24, op23, 0b00, op11_8, op4, itinD16,
3666 def v16i8 : N3VQMulOp<op24, op23, 0b00, op11_8, op4, itinQ16,
3697 def v8i8 : N3VDIntOp<op24, op23, 0b00, op11_8, op4, itinD,
3705 def v16i8 : N3VQIntOp<op24, op23, 0b00, op11_8, op4, itinQ,
3740 def v8i8 : N3VDInt3<op24, op23, 0b00, op11_8, op4, itinD16,
3743 def v16i8 : N3VQInt3<op24, op23, 0b00, op11_8, op4, itinQ16,
3753 def v8i16 : N3VLMulOp<op24, op23, 0b00, op11_8, op4, itin16, OpcodeStr,
3795 def v8i16 : N3VLInt3<op24, op23, 0b00, op11_8, op4, itin16,
3803 def v8i16 : N3VLIntExtOp<op24, op23, 0b00, op11_8, op4, itin,
3821 def v8i8 : N2VDPLInt<op24_23, op21_20, 0b00, op17_16, op11_7, op4,
3829 def v16i8 : N2VQPLInt<op24_23, op21_20, 0b00, op17_16, op11_7, op4,
3844 def v8i8 : N2VDPLInt2<op24_23, op21_20, 0b00, op17_16, op11_7, op4,
3852 def v16i8 : N2VQPLInt2<op24_23, op21_20, 0b00, op17_16, op11_7, op4,
4104 def VADDfd : N3VD<0, 0, 0b00, 0b1101, 0, IIC_VBIND, "vadd", "f32",
4106 def VADDfq : N3VQ<0, 0, 0b00, 0b1101, 0, IIC_VBINQ, "vadd", "f32",
4155 def VMULpd : N3VDInt<1, 0, 0b00, 0b1001, 1, N3RegFrm, IIC_VMULi16D, "vmul",
4157 def VMULpq : N3VQInt<1, 0, 0b00, 0b1001, 1, N3RegFrm, IIC_VMULi16Q, "vmul",
4159 def VMULfd : N3VD<1, 0, 0b00, 0b1101, 1, IIC_VFMULD, "vmul", "f32",
4161 def VMULfq : N3VQ<1, 0, 0b00, 0b1101, 1, IIC_VFMULQ, "vmul", "f32",
4249 def VMULLp8 : N3VLInt<0, 1, 0b00, 0b1110, 0, IIC_VMULi16D, "vmull", "p8",
4269 def VMLAfd : N3VDMulOp<0, 0, 0b00, 0b1101, 1, IIC_VMACD, "vmla", "f32",
4272 def VMLAfq : N3VQMulOp<0, 0, 0b00, 0b1101, 1, IIC_VMACQ, "vmla", "f32",
4561 def VFMAfd : N3VDMulOp<0, 0, 0b00, 0b1100, 1, IIC_VFMACD, "vfma", "f32",
4565 def VFMAfq : N3VQMulOp<0, 0, 0b00, 0b1100, 1, IIC_VFMACQ, "vfma", "f32",
4640 def VCEQfd : N3VD<0,0,0b00,0b1110,0, IIC_VBIND, "vceq", "f32", v2i32, v2f32,
4642 def VCEQfq : N3VQ<0,0,0b00,0b1110,0, IIC_VBINQ, "vceq", "f32", v4i32, v4f32,
4654 def VCGEfd : N3VD<1,0,0b00,0b1110,0, IIC_VBIND, "vcge", "f32", v2i32, v2f32,
4656 def VCGEfq : N3VQ<1,0,0b00,0b1110,0, IIC_VBINQ, "vcge", "f32", v4i32, v4f32,
4684 def VACGEd : N3VDInt<1, 0, 0b00, 0b1110, 1, N3RegFrm, IIC_VBIND, "vacge",
4686 def VACGEq : N3VQInt<1, 0, 0b00, 0b1110, 1, N3RegFrm, IIC_VBINQ, "vacge",
4724 def VANDd : N3VDX<0, 0, 0b00, 0b0001, 1, IIC_VBINiD, "vand",
4726 def VANDq : N3VQX<0, 0, 0b00, 0b0001, 1, IIC_VBINiQ, "vand",
4730 def VEORd : N3VDX<1, 0, 0b00, 0b0001, 1, IIC_VBINiD, "veor",
4732 def VEORq : N3VQX<1, 0, 0b00, 0b0001, 1, IIC_VBINiQ, "veor",
4874 def VMVNd : N2VX<0b11, 0b11, 0b00, 0b00, 0b01011, 0, 0,
4878 def VMVNq : N2VX<0b11, 0b11, 0b00, 0b00, 0b01011, 1, 0,
5033 def VMAXfd : N3VDInt<0, 0, 0b00, 0b1111, 0, N3RegFrm, IIC_VBIND,
5036 def VMAXfq : N3VQInt<0, 0, 0b00, 0b1111, 0, N3RegFrm, IIC_VBINQ,
5042 def VMAXNMND : N3VDIntnp<0b00110, 0b00, 0b1111, 0, 1,
5046 def VMAXNMNQ : N3VQIntnp<0b00110, 0b00, 0b1111, 1, 1,
5081 def VPADDi8 : N3VDInt<0, 0, 0b00, 0b1011, 1, N3RegFrm, IIC_VSHLiD,
5090 def VPADDf : N3VDInt<1, 0, 0b00, 0b1101, 0, N3RegFrm,
5095 defm VPADDLs : N2VPLInt_QHS<0b11, 0b11, 0b00, 0b00100, 0, "vpaddl", "s",
5097 defm VPADDLu : N2VPLInt_QHS<0b11, 0b11, 0b00, 0b00101, 0, "vpaddl", "u",
5101 defm VPADALs : N2VPLInt2_QHS<0b11, 0b11, 0b00, 0b01100, 0, "vpadal", "s",
5103 defm VPADALu : N2VPLInt2_QHS<0b11, 0b11, 0b00, 0b01101, 0, "vpadal", "u",
5107 def VPMAXs8 : N3VDInt<0, 0, 0b00, 0b1010, 0, N3RegFrm, IIC_VSUBi4D, "vpmax",
5113 def VPMAXu8 : N3VDInt<1, 0, 0b00, 0b1010, 0, N3RegFrm, IIC_VSUBi4D, "vpmax",
5119 def VPMAXf : N3VDInt<1, 0, 0b00, 0b1111, 0, N3RegFrm, IIC_VPBIND, "vpmax",
5123 def VPMINs8 : N3VDInt<0, 0, 0b00, 0b1010, 1, N3RegFrm, IIC_VSUBi4D, "vpmin",
5129 def VPMINu8 : N3VDInt<1, 0, 0b00, 0b1010, 1, N3RegFrm, IIC_VSUBi4D, "vpmin",
5155 def VRECPSfd : N3VDInt<0, 0, 0b00, 0b1111, 1, N3RegFrm,
5158 def VRECPSfq : N3VQInt<0, 0, 0b00, 0b1111, 1, N3RegFrm,
5359 defm VQABS : N2VInt_QHS<0b11, 0b11, 0b00, 0b01110, 0,
5380 def VNEGs8d : VNEGD<0b00, "vneg", "s8", v8i8>;
5383 def VNEGs8q : VNEGQ<0b00, "vneg", "s8", v16i8>;
5405 defm VQNEG : N2VInt_QHS<0b11, 0b11, 0b00, 0b01111, 0,
5412 defm VCLS : N2VInt_QHS<0b11, 0b11, 0b00, 0b01000, 0,
5416 defm VCLZ : N2VInt_QHS<0b11, 0b11, 0b00, 0b01001, 0,
5420 def VCNTd : N2VDInt<0b11, 0b11, 0b00, 0b00, 0b01010, 0,
5423 def VCNTq : N2VQInt<0b11, 0b11, 0b00, 0b00, 0b01010, 0,
5428 def VSWPd : N2VX<0b11, 0b11, 0b00, 0b10, 0b00000, 0, 0,
5432 def VSWPq : N2VX<0b11, 0b11, 0b00, 0b10, 0b00000, 1, 0,
5587 def VGETLNi32 : NVGetLane<{1,1,1,0,0,0,?,1}, 0b1011, 0b00,
5656 def VSETLNi32 : NVSetLane<{1,1,1,0,0,0,?,0}, 0b1011, 0b00, (outs DPR:$V),
5737 def VDUP8d : VDUPD<0b11101100, 0b00, "8", v8i8>;
5739 def VDUP32d : VDUPD<0b11101000, 0b00, "32", v2i32>,
5741 def VDUP8q : VDUPQ<0b11101110, 0b00, "8", v16i8>;
5743 def VDUP32q : VDUPQ<0b11101010, 0b00, "32", v4i32>;
5943 : N2V<0b11, 0b11, op19_18, 0b00, 0b00000, 0, 0, (outs DPR:$Vd),
5948 : N2V<0b11, 0b11, op19_18, 0b00, 0b00000, 1, 0, (outs QPR:$Vd),
5953 def VREV64d8 : VREV64D<0b00, "vrev64", "8", v8i8>;
5958 def VREV64q8 : VREV64Q<0b00, "vrev64", "8", v16i8>;
5966 : N2V<0b11, 0b11, op19_18, 0b00, 0b00001, 0, 0, (outs DPR:$Vd),
5971 : N2V<0b11, 0b11, op19_18, 0b00, 0b00001, 1, 0, (outs QPR:$Vd),
5976 def VREV32d8 : VREV32D<0b00, "vrev32", "8", v8i8>;
5979 def VREV32q8 : VREV32Q<0b00, "vrev32", "8", v16i8>;
5985 : N2V<0b11, 0b11, op19_18, 0b00, 0b00010, 0, 0, (outs DPR:$Vd),
5990 : N2V<0b11, 0b11, op19_18, 0b00, 0b00010, 1, 0, (outs QPR:$Vd),
5995 def VREV16d8 : VREV16D<0b00, "vrev16", "8", v8i8>;
5996 def VREV16q8 : VREV16Q<0b00, "vrev16", "8", v16i8>;
6053 let Inst{9-8} = 0b00;
6069 let Inst{9-8} = 0b00;
6082 def VTRNd8 : N2VDShuffle<0b00, 0b00001, "vtrn", "8">;
6086 def VTRNq8 : N2VQShuffle<0b00, 0b00001, IIC_VPERMQ, "vtrn", "8">;
6092 def VUZPd8 : N2VDShuffle<0b00, 0b00010, "vuzp", "8">;
6098 def VUZPq8 : N2VQShuffle<0b00, 0b00010, IIC_VPERMQ3, "vuzp", "8">;
6104 def VZIPd8 : N2VDShuffle<0b00, 0b00011, "vzip", "8">;
6110 def VZIPq8 : N2VQShuffle<0b00, 0b00011, IIC_VPERMQ3, "vzip", "8">;
6209 : N2VQIntXnp<0b00, 0b00, 0b011, op6, op7, NoItinerary,
6213 : N2VQIntX2np<0b00, 0b00, 0b011, op6, op7, NoItinerary,
6240 def SHA1C : N3SHA3Op<"1c", 0b00100, 0b00, null_frag>;
6244 def SHA256H : N3SHA3Op<"256h", 0b00110, 0b00, int_arm_neon_sha256h>;
