Lines Matching refs:Insn
186 static DecodeStatus DecodeBitfieldMaskOperand(MCInst &Inst, unsigned Insn,
188 static DecodeStatus DecodeCopMemInstruction(MCInst &Inst, unsigned Insn,
191 unsigned Insn,
194 static DecodeStatus DecodeSORegMemOperand(MCInst &Inst, unsigned Insn,
196 static DecodeStatus DecodeAddrMode3Instruction(MCInst &Inst,unsigned Insn,
198 static DecodeStatus DecodeSORegImmOperand(MCInst &Inst, unsigned Insn,
200 static DecodeStatus DecodeSORegRegOperand(MCInst &Inst, unsigned Insn,
204 unsigned Insn,
207 static DecodeStatus DecodeT2MOVTWInstruction(MCInst &Inst, unsigned Insn,
209 static DecodeStatus DecodeArmMOVTWInstruction(MCInst &Inst, unsigned Insn,
211 static DecodeStatus DecodeSMLAInstruction(MCInst &Inst, unsigned Insn,
213 static DecodeStatus DecodeCPSInstruction(MCInst &Inst, unsigned Insn,
215 static DecodeStatus DecodeTSTInstruction(MCInst &Inst, unsigned Insn,
217 static DecodeStatus DecodeSETPANInstruction(MCInst &Inst, unsigned Insn,
219 static DecodeStatus DecodeT2CPSInstruction(MCInst &Inst, unsigned Insn,
227 static DecodeStatus DecodeT2BInstruction(MCInst &Inst, unsigned Insn,
229 static DecodeStatus DecodeBranchImmInstruction(MCInst &Inst,unsigned Insn,
265 static DecodeStatus DecodeTBLInstruction(MCInst &Inst, unsigned Insn,
267 static DecodeStatus DecodePostIdxReg(MCInst &Inst, unsigned Insn,
269 static DecodeStatus DecodeCoprocessor(MCInst &Inst, unsigned Insn,
271 static DecodeStatus DecodeMemBarrierOption(MCInst &Inst, unsigned Insn,
273 static DecodeStatus DecodeInstSyncBarrierOption(MCInst &Inst, unsigned Insn,
275 static DecodeStatus DecodeMSRMask(MCInst &Inst, unsigned Insn,
277 static DecodeStatus DecodeBankedReg(MCInst &Inst, unsigned Insn,
279 static DecodeStatus DecodeDoubleRegLoad(MCInst &Inst, unsigned Insn,
281 static DecodeStatus DecodeDoubleRegStore(MCInst &Inst, unsigned Insn,
283 static DecodeStatus DecodeLDRPreImm(MCInst &Inst, unsigned Insn,
285 static DecodeStatus DecodeLDRPreReg(MCInst &Inst, unsigned Insn,
287 static DecodeStatus DecodeSTRPreImm(MCInst &Inst, unsigned Insn,
289 static DecodeStatus DecodeSTRPreReg(MCInst &Inst, unsigned Insn,
291 static DecodeStatus DecodeVLD1LN(MCInst &Inst, unsigned Insn,
293 static DecodeStatus DecodeVLD2LN(MCInst &Inst, unsigned Insn,
295 static DecodeStatus DecodeVLD3LN(MCInst &Inst, unsigned Insn,
297 static DecodeStatus DecodeVLD4LN(MCInst &Inst, unsigned Insn,
299 static DecodeStatus DecodeVST1LN(MCInst &Inst, unsigned Insn,
301 static DecodeStatus DecodeVST2LN(MCInst &Inst, unsigned Insn,
303 static DecodeStatus DecodeVST3LN(MCInst &Inst, unsigned Insn,
305 static DecodeStatus DecodeVST4LN(MCInst &Inst, unsigned Insn,
307 static DecodeStatus DecodeVMOVSRR(MCInst &Inst, unsigned Insn,
309 static DecodeStatus DecodeVMOVRRS(MCInst &Inst, unsigned Insn,
311 static DecodeStatus DecodeSwap(MCInst &Inst, unsigned Insn,
313 static DecodeStatus DecodeVCVTD(MCInst &Inst, unsigned Insn,
315 Insn,
319 static DecodeStatus DecodeThumbAddSpecialReg(MCInst &Inst, uint16_t Insn,
339 static DecodeStatus DecodeT2LoadImm8(MCInst &Inst, unsigned Insn,
341 static DecodeStatus DecodeT2LoadImm12(MCInst &Inst, unsigned Insn,
343 static DecodeStatus DecodeT2LoadT(MCInst &Inst, unsigned Insn,
345 static DecodeStatus DecodeT2LoadLabel(MCInst &Inst, unsigned Insn,
359 static DecodeStatus DecodeThumbAddSPReg(MCInst &Inst, uint16_t Insn,
361 static DecodeStatus DecodeThumbCPS(MCInst &Inst, uint16_t Insn,
363 static DecodeStatus DecodeQADDInstruction(MCInst &Inst, unsigned Insn,
365 static DecodeStatus DecodeThumbBLXOffset(MCInst &Inst, unsigned Insn,
381 static DecodeStatus DecodeT2LDRDPreInstruction(MCInst &Inst,unsigned Insn,
383 static DecodeStatus DecodeT2STRDPreInstruction(MCInst &Inst,unsigned Insn,
414 uint32_t Insn,
421 uint32_t Cond = (Insn >> 28) & 0xF;
449 uint32_t Insn =
454 decodeInstruction(DecoderTableARM32, MI, Insn, Address, this, STI);
457 return checkDecodedInstruction(MI, Size, Address, OS, CS, Insn, Result);
463 Result = decodeInstruction(DecoderTableVFP32, MI, Insn, Address, this, STI);
470 Result = decodeInstruction(DecoderTableVFPV832, MI, Insn, Address, this, STI);
478 decodeInstruction(DecoderTableNEONData32, MI, Insn, Address, this, STI);
489 Result = decodeInstruction(DecoderTableNEONLoadStore32, MI, Insn, Address,
502 decodeInstruction(DecoderTableNEONDup32, MI, Insn, Address, this, STI);
514 decodeInstruction(DecoderTablev8NEON32, MI, Insn, Address, this, STI);
522 decodeInstruction(DecoderTablev8Crypto32, MI, Insn, Address, this, STI);
1325 static DecodeStatus DecodeCopMemInstruction(MCInst &Inst, unsigned Insn,
1329 unsigned pred = fieldFromInstruction(Insn, 28, 4);
1330 unsigned CRd = fieldFromInstruction(Insn, 12, 4);
1331 unsigned coproc = fieldFromInstruction(Insn, 8, 4);
1332 unsigned imm = fieldFromInstruction(Insn, 0, 8);
1333 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
1334 unsigned U = fieldFromInstruction(Insn, 23, 1);
1475 DecodeAddrMode2IdxInstruction(MCInst &Inst, unsigned Insn,
1479 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
1480 unsigned Rt = fieldFromInstruction(Insn, 12, 4);
1481 unsigned Rm = fieldFromInstruction(Insn, 0, 4);
1482 unsigned imm = fieldFromInstruction(Insn, 0, 12);
1483 unsigned pred = fieldFromInstruction(Insn, 28, 4);
1484 unsigned reg = fieldFromInstruction(Insn, 25, 1);
1485 unsigned P = fieldFromInstruction(Insn, 24, 1);
1486 unsigned W = fieldFromInstruction(Insn, 21, 1);
1529 if (!fieldFromInstruction(Insn, 23, 1))
1546 switch( fieldFromInstruction(Insn, 5, 2)) {
1562 unsigned amt = fieldFromInstruction(Insn, 7, 5);
1624 DecodeAddrMode3Instruction(MCInst &Inst, unsigned Insn,
1628 unsigned Rt = fieldFromInstruction(Insn, 12, 4);
1629 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
1630 unsigned Rm = fieldFromInstruction(Insn, 0, 4);
1631 unsigned type = fieldFromInstruction(Insn, 22, 1);
1632 unsigned imm = fieldFromInstruction(Insn, 8, 4);
1633 unsigned U = ((~fieldFromInstruction(Insn, 23, 1)) & 1) << 8;
1634 unsigned pred = fieldFromInstruction(Insn, 28, 4);
1635 unsigned W = fieldFromInstruction(Insn, 21, 1);
1636 unsigned P = fieldFromInstruction(Insn, 24, 1);
1667 if (!type && fieldFromInstruction(Insn, 8, 4))
1815 static DecodeStatus DecodeRFEInstruction(MCInst &Inst, unsigned Insn,
1819 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
1820 unsigned mode = fieldFromInstruction(Insn, 23, 2);
1844 static DecodeStatus DecodeQADDInstruction(MCInst &Inst, unsigned Insn,
1848 unsigned Rd = fieldFromInstruction(Insn, 12, 4);
1849 unsigned Rm = fieldFromInstruction(Insn, 0, 4);
1850 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
1851 unsigned pred = fieldFromInstruction(Insn, 28, 4);
1854 return DecodeCPSInstruction(Inst, Insn, Address, Decoder);
1868 unsigned Insn,
1872 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
1873 unsigned pred = fieldFromInstruction(Insn, 28, 4);
1874 unsigned reglist = fieldFromInstruction(Insn, 0, 16);
1932 if (fieldFromInstruction(Insn, 20, 1) == 0) {
1934 if (!(fieldFromInstruction(Insn, 22, 1) == 1 &&
1935 fieldFromInstruction(Insn, 20, 1) == 0))
1939 MCOperand::CreateImm(fieldFromInstruction(Insn, 0, 4)));
1943 return DecodeRFEInstruction(Inst, Insn, Address, Decoder);
1958 static DecodeStatus DecodeCPSInstruction(MCInst &Inst, unsigned Insn,
1960 unsigned imod = fieldFromInstruction(Insn, 18, 2);
1961 unsigned M = fieldFromInstruction(Insn, 17, 1);
1962 unsigned iflags = fieldFromInstruction(Insn, 6, 3);
1963 unsigned mode = fieldFromInstruction(Insn, 0, 5);
1969 if (fieldFromInstruction(Insn, 5, 1) != 0 ||
1970 fieldFromInstruction(Insn, 16, 1) != 0 ||
1971 fieldFromInstruction(Insn, 20, 8) != 0x10)
2005 static DecodeStatus DecodeT2CPSInstruction(MCInst &Inst, unsigned Insn,
2007 unsigned imod = fieldFromInstruction(Insn, 9, 2);
2008 unsigned M = fieldFromInstruction(Insn, 8, 1);
2009 unsigned iflags = fieldFromInstruction(Insn, 5, 3);
2010 unsigned mode = fieldFromInstruction(Insn, 0, 5);
2037 int imm = fieldFromInstruction(Insn, 0, 8);
2047 static DecodeStatus DecodeT2MOVTWInstruction(MCInst &Inst, unsigned Insn,
2051 unsigned Rd = fieldFromInstruction(Insn, 8, 4);
2054 imm |= (fieldFromInstruction(Insn, 0, 8) << 0);
2055 imm |= (fieldFromInstruction(Insn, 12, 3) << 8);
2056 imm |= (fieldFromInstruction(Insn, 16, 4) << 12);
2057 imm |= (fieldFromInstruction(Insn, 26, 1) << 11);
2071 static DecodeStatus DecodeArmMOVTWInstruction(MCInst &Inst, unsigned Insn,
2075 unsigned Rd = fieldFromInstruction(Insn, 12, 4);
2076 unsigned pred = fieldFromInstruction(Insn, 28, 4);
2079 imm |= (fieldFromInstruction(Insn, 0, 12) << 0);
2080 imm |= (fieldFromInstruction(Insn, 16, 4) << 12);
2098 static DecodeStatus DecodeSMLAInstruction(MCInst &Inst, unsigned Insn,
2102 unsigned Rd = fieldFromInstruction(Insn, 16, 4);
2103 unsigned Rn = fieldFromInstruction(Insn, 0, 4);
2104 unsigned Rm = fieldFromInstruction(Insn, 8, 4);
2105 unsigned Ra = fieldFromInstruction(Insn, 12, 4);
2106 unsigned pred = fieldFromInstruction(Insn, 28, 4);
2109 return DecodeCPSInstruction(Inst, Insn, Address, Decoder);
2126 static DecodeStatus DecodeTSTInstruction(MCInst &Inst, unsigned Insn,
2130 unsigned Pred = fieldFromInstruction(Insn, 28, 4);
2131 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
2132 unsigned Rm = fieldFromInstruction(Insn, 0, 4);
2135 return DecodeSETPANInstruction(Inst, Insn, Address, Decoder);
2147 static DecodeStatus DecodeSETPANInstruction(MCInst &Inst, unsigned Insn,
2151 unsigned Imm = fieldFromInstruction(Insn, 9, 1);
2161 if (fieldFromInstruction(Insn, 20,12) != 0xf11 ||
2162 fieldFromInstruction(Insn, 4,4) != 0)
2164 if (fieldFromInstruction(Insn, 10,10) != 0 ||
2165 fieldFromInstruction(Insn, 0,4) != 0)
2219 DecodeT2BInstruction(MCInst &Inst, unsigned Insn,
2229 unsigned S = fieldFromInstruction(Insn, 26, 1);
2230 unsigned J1 = fieldFromInstruction(Insn, 13, 1);
2231 unsigned J2 = fieldFromInstruction(Insn, 11, 1);
2234 unsigned imm10 = fieldFromInstruction(Insn, 16, 10);
2235 unsigned imm11 = fieldFromInstruction(Insn, 0, 11);
2246 DecodeBranchImmInstruction(MCInst &Inst, unsigned Insn,
2250 unsigned pred = fieldFromInstruction(Insn, 28, 4);
2251 unsigned imm = fieldFromInstruction(Insn, 0, 24) << 2;
2255 imm |= fieldFromInstruction(Insn, 24, 1) << 1;
2289 static DecodeStatus DecodeVLDInstruction(MCInst &Inst, unsigned Insn,
2293 unsigned Rd = fieldFromInstruction(Insn, 12, 4);
2294 Rd |= fieldFromInstruction(Insn, 22, 1) << 4;
2295 unsigned wb = fieldFromInstruction(Insn, 16, 4);
2296 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
2297 Rn |= fieldFromInstruction(Insn, 4, 2) << 4;
2298 unsigned Rm = fieldFromInstruction(Insn, 0, 4);
2563 static DecodeStatus DecodeVLDST1Instruction(MCInst &Inst, unsigned Insn,
2565 unsigned type = fieldFromInstruction(Insn, 8, 4);
2566 unsigned align = fieldFromInstruction(Insn, 4, 2);
2571 unsigned load = fieldFromInstruction(Insn, 21, 1);
2572 return load ? DecodeVLDInstruction(Inst, Insn, Address, Decoder)
2573 : DecodeVSTInstruction(Inst, Insn, Address, Decoder);
2576 static DecodeStatus DecodeVLDST2Instruction(MCInst &Inst, unsigned Insn,
2578 unsigned size = fieldFromInstruction(Insn, 6, 2);
2581 unsigned type = fieldFromInstruction(Insn, 8, 4);
2582 unsigned align = fieldFromInstruction(Insn, 4, 2);
2586 unsigned load = fieldFromInstruction(Insn, 21, 1);
2587 return load ? DecodeVLDInstruction(Inst, Insn, Address, Decoder)
2588 : DecodeVSTInstruction(Inst, Insn, Address, Decoder);
2591 static DecodeStatus DecodeVLDST3Instruction(MCInst &Inst, unsigned Insn,
2593 unsigned size = fieldFromInstruction(Insn, 6, 2);
2596 unsigned align = fieldFromInstruction(Insn, 4, 2);
2599 unsigned load = fieldFromInstruction(Insn, 21, 1);
2600 return load ? DecodeVLDInstruction(Inst, Insn, Address, Decoder)
2601 : DecodeVSTInstruction(Inst, Insn, Address, Decoder);
2604 static DecodeStatus DecodeVLDST4Instruction(MCInst &Inst, unsigned Insn,
2606 unsigned size = fieldFromInstruction(Insn, 6, 2);
2609 unsigned load = fieldFromInstruction(Insn, 21, 1);
2610 return load ? DecodeVLDInstruction(Inst, Insn, Address, Decoder)
2611 : DecodeVSTInstruction(Inst, Insn, Address, Decoder);
2614 static DecodeStatus DecodeVSTInstruction(MCInst &Inst, unsigned Insn,
2618 unsigned Rd = fieldFromInstruction(Insn, 12, 4);
2619 Rd |= fieldFromInstruction(Insn, 22, 1) << 4;
2620 unsigned wb = fieldFromInstruction(Insn, 16, 4);
2621 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
2622 Rn |= fieldFromInstruction(Insn, 4, 2) << 4;
2623 unsigned Rm = fieldFromInstruction(Insn, 0, 4);
2885 static DecodeStatus DecodeVLD1DupInstruction(MCInst &Inst, unsigned Insn,
2889 unsigned Rd = fieldFromInstruction(Insn, 12, 4);
2890 Rd |= fieldFromInstruction(Insn, 22, 1) << 4;
2891 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
2892 unsigned Rm = fieldFromInstruction(Insn, 0, 4);
2893 unsigned align = fieldFromInstruction(Insn, 4, 1);
2894 unsigned size = fieldFromInstruction(Insn, 6, 2);
2932 static DecodeStatus DecodeVLD2DupInstruction(MCInst &Inst, unsigned Insn,
2936 unsigned Rd = fieldFromInstruction(Insn, 12, 4);
2937 Rd |= fieldFromInstruction(Insn, 22, 1) << 4;
2938 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
2939 unsigned Rm = fieldFromInstruction(Insn, 0, 4);
2940 unsigned align = fieldFromInstruction(Insn, 4, 1);
2941 unsigned size = 1 << fieldFromInstruction(Insn, 6, 2);
2980 static DecodeStatus DecodeVLD3DupInstruction(MCInst &Inst, unsigned Insn,
2984 unsigned Rd = fieldFromInstruction(Insn, 12, 4);
2985 Rd |= fieldFromInstruction(Insn, 22, 1) << 4;
2986 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
2987 unsigned Rm = fieldFromInstruction(Insn, 0, 4);
2988 unsigned inc = fieldFromInstruction(Insn, 5, 1) + 1;
3015 static DecodeStatus DecodeVLD4DupInstruction(MCInst &Inst, unsigned Insn,
3019 unsigned Rd = fieldFromInstruction(Insn, 12, 4);
3020 Rd |= fieldFromInstruction(Insn, 22, 1) << 4;
3021 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
3022 unsigned Rm = fieldFromInstruction(Insn, 0, 4);
3023 unsigned size = fieldFromInstruction(Insn, 6, 2);
3024 unsigned inc = fieldFromInstruction(Insn, 5, 1) + 1;
3025 unsigned align = fieldFromInstruction(Insn, 4, 1);
3068 DecodeNEONModImmInstruction(MCInst &Inst, unsigned Insn,
3072 unsigned Rd = fieldFromInstruction(Insn, 12, 4);
3073 Rd |= fieldFromInstruction(Insn, 22, 1) << 4;
3074 unsigned imm = fieldFromInstruction(Insn, 0, 4);
3075 imm |= fieldFromInstruction(Insn, 16, 3) << 4;
3076 imm |= fieldFromInstruction(Insn, 24, 1) << 7;
3077 imm |= fieldFromInstruction(Insn, 8, 4) << 8;
3078 imm |= fieldFromInstruction(Insn, 5, 1) << 12;
3079 unsigned Q = fieldFromInstruction(Insn, 6, 1);
3113 static DecodeStatus DecodeVSHLMaxInstruction(MCInst &Inst, unsigned Insn,
3117 unsigned Rd = fieldFromInstruction(Insn, 12, 4);
3118 Rd |= fieldFromInstruction(Insn, 22, 1) << 4;
3119 unsigned Rm = fieldFromInstruction(Insn, 0, 4);
3120 Rm |= fieldFromInstruction(Insn, 5, 1) << 4;
3121 unsigned size = fieldFromInstruction(Insn, 18, 2);
3156 static DecodeStatus DecodeTBLInstruction(MCInst &Inst, unsigned Insn,
3160 unsigned Rd = fieldFromInstruction(Insn, 12, 4);
3161 Rd |= fieldFromInstruction(Insn, 22, 1) << 4;
3162 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
3163 Rn |= fieldFromInstruction(Insn, 7, 1) << 4;
3164 unsigned Rm = fieldFromInstruction(Insn, 0, 4);
3165 Rm |= fieldFromInstruction(Insn, 5, 1) << 4;
3166 unsigned op = fieldFromInstruction(Insn, 6, 1);
3192 static DecodeStatus DecodeThumbAddSpecialReg(MCInst &Inst, uint16_t Insn,
3196 unsigned dst = fieldFromInstruction(Insn, 8, 3);
3197 unsigned imm = fieldFromInstruction(Insn, 0, 8);
3315 static DecodeStatus DecodeT2LoadShift(MCInst &Inst, unsigned Insn,
3319 unsigned Rt = fieldFromInstruction(Insn, 12, 4);
3320 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
3354 return DecodeT2LoadLabel(Inst, Insn, Address, Decoder);
3387 unsigned addrmode = fieldFromInstruction(Insn, 4, 2);
3388 addrmode |= fieldFromInstruction(Insn, 0, 4) << 2;
3389 addrmode |= fieldFromInstruction(Insn, 16, 4) << 6;
3396 static DecodeStatus DecodeT2LoadImm8(MCInst &Inst, unsigned Insn,
3400 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
3401 unsigned Rt = fieldFromInstruction(Insn, 12, 4);
3402 unsigned U = fieldFromInstruction(Insn, 9, 1);
3403 unsigned imm = fieldFromInstruction(Insn, 0, 8);
3406 unsigned add = fieldFromInstruction(Insn, 9, 1);
3439 return DecodeT2LoadLabel(Inst, Insn, Address, Decoder);
3479 static DecodeStatus DecodeT2LoadImm12(MCInst &Inst, unsigned Insn,
3483 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
3484 unsigned Rt = fieldFromInstruction(Insn, 12, 4);
3485 unsigned imm = fieldFromInstruction(Insn, 0, 12);
3519 return DecodeT2LoadLabel(Inst, Insn, Address, Decoder);
3558 static DecodeStatus DecodeT2LoadT(MCInst &Inst, unsigned Insn,
3562 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
3563 unsigned Rt = fieldFromInstruction(Insn, 12, 4);
3564 unsigned imm = fieldFromInstruction(Insn, 0, 8);
3587 return DecodeT2LoadLabel(Inst, Insn, Address, Decoder);
3597 static DecodeStatus DecodeT2LoadLabel(MCInst &Inst, unsigned Insn,
3601 unsigned Rt = fieldFromInstruction(Insn, 12, 4);
3602 unsigned U = fieldFromInstruction(Insn, 23, 1);
3603 int imm = fieldFromInstruction(Insn, 0, 12);
3752 static DecodeStatus DecodeT2LdStPre(MCInst &Inst, unsigned Insn,
3756 unsigned Rt = fieldFromInstruction(Insn, 12, 4);
3757 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
3758 unsigned addr = fieldFromInstruction(Insn, 0, 8);
3759 addr |= fieldFromInstruction(Insn, 9, 1) << 8;
3761 unsigned load = fieldFromInstruction(Insn, 20, 1);
3791 return DecodeT2LoadLabel(Inst, Insn, Address, Decoder);
3839 static DecodeStatus DecodeThumbAddSPImm(MCInst &Inst, uint16_t Insn,
3841 unsigned imm = fieldFromInstruction(Insn, 0, 7);
3850 static DecodeStatus DecodeThumbAddSPReg(MCInst &Inst, uint16_t Insn,
3855 unsigned Rdm = fieldFromInstruction(Insn, 0, 3);
3856 Rdm |= fieldFromInstruction(Insn, 7, 1) << 3;
3864 unsigned Rm = fieldFromInstruction(Insn, 3, 4);
3875 static DecodeStatus DecodeThumbCPS(MCInst &Inst, uint16_t Insn,
3877 unsigned imod = fieldFromInstruction(Insn, 4, 1) | 0x2;
3878 unsigned flags = fieldFromInstruction(Insn, 0, 3);
3886 static DecodeStatus DecodePostIdxReg(MCInst &Inst, unsigned Insn,
3889 unsigned Rm = fieldFromInstruction(Insn, 0, 4);
3890 unsigned add = fieldFromInstruction(Insn, 4, 1);
3938 DecodeThumbTableBranch(MCInst &Inst, unsigned Insn,
3942 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
3943 unsigned Rm = fieldFromInstruction(Insn, 0, 4);
3954 DecodeThumb2BCCInstruction(MCInst &Inst, unsigned Insn,
3958 unsigned pred = fieldFromInstruction(Insn, 22, 4);
3960 unsigned opc = fieldFromInstruction(Insn, 4, 28);
3975 unsigned imm = fieldFromInstruction(Insn, 0, 4);
3979 unsigned brtarget = fieldFromInstruction(Insn, 0, 11) << 1;
3980 brtarget |= fieldFromInstruction(Insn, 11, 1) << 19;
3981 brtarget |= fieldFromInstruction(Insn, 13, 1) << 18;
3982 brtarget |= fieldFromInstruction(Insn, 16, 6) << 12;
3983 brtarget |= fieldFromInstruction(Insn, 26, 1) << 20;
4162 static DecodeStatus DecodeDoubleRegLoad(MCInst &Inst, unsigned Insn,
4166 unsigned Rt = fieldFromInstruction(Insn, 12, 4);
4167 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
4168 unsigned pred = fieldFromInstruction(Insn, 28, 4);
4183 static DecodeStatus DecodeDoubleRegStore(MCInst &Inst, unsigned Insn,
4187 unsigned Rd = fieldFromInstruction(Insn, 12, 4);
4188 unsigned Rt = fieldFromInstruction(Insn, 0, 4);
4189 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
4190 unsigned pred = fieldFromInstruction(Insn, 28, 4);
4208 static DecodeStatus DecodeLDRPreImm(MCInst &Inst, unsigned Insn,
4212 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
4213 unsigned Rt = fieldFromInstruction(Insn, 12, 4);
4214 unsigned imm = fieldFromInstruction(Insn, 0, 12);
4215 imm |= fieldFromInstruction(Insn, 16, 4) << 13;
4216 imm |= fieldFromInstruction(Insn, 23, 1) << 12;
4217 unsigned pred = fieldFromInstruction(Insn, 28, 4);
4233 static DecodeStatus DecodeLDRPreReg(MCInst &Inst, unsigned Insn,
4237 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
4238 unsigned Rt = fieldFromInstruction(Insn, 12, 4);
4239 unsigned imm = fieldFromInstruction(Insn, 0, 12);
4240 imm |= fieldFromInstruction(Insn, 16, 4) << 13;
4241 imm |= fieldFromInstruction(Insn, 23, 1) << 12;
4242 unsigned pred = fieldFromInstruction(Insn, 28, 4);
4243 unsigned Rm = fieldFromInstruction(Insn, 0, 4);
4261 static DecodeStatus DecodeSTRPreImm(MCInst &Inst, unsigned Insn,
4265 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
4266 unsigned Rt = fieldFromInstruction(Insn, 12, 4);
4267 unsigned imm = fieldFromInstruction(Insn, 0, 12);
4268 imm |= fieldFromInstruction(Insn, 16, 4) << 13;
4269 imm |= fieldFromInstruction(Insn, 23, 1) << 12;
4270 unsigned pred = fieldFromInstruction(Insn, 28, 4);
4286 static DecodeStatus DecodeSTRPreReg(MCInst &Inst, unsigned Insn,
4290 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
4291 unsigned Rt = fieldFromInstruction(Insn, 12, 4);
4292 unsigned imm = fieldFromInstruction(Insn, 0, 12);
4293 imm |= fieldFromInstruction(Insn, 16, 4) << 13;
4294 imm |= fieldFromInstruction(Insn, 23, 1) << 12;
4295 unsigned pred = fieldFromInstruction(Insn, 28, 4);
4311 static DecodeStatus DecodeVLD1LN(MCInst &Inst, unsigned Insn,
4315 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
4316 unsigned Rm = fieldFromInstruction(Insn, 0, 4);
4317 unsigned Rd = fieldFromInstruction(Insn, 12, 4);
4318 Rd |= fieldFromInstruction(Insn, 22, 1) << 4;
4319 unsigned size = fieldFromInstruction(Insn, 10, 2);
4327 if (fieldFromInstruction(Insn, 4, 1))
4329 index = fieldFromInstruction(Insn, 5, 3);
4332 if (fieldFromInstruction(Insn, 5, 1))
4334 index = fieldFromInstruction(Insn, 6, 2);
4335 if (fieldFromInstruction(Insn, 4, 1))
4339 if (fieldFromInstruction(Insn, 6, 1))
4341 index = fieldFromInstruction(Insn, 7, 1);
4343 switch (fieldFromInstruction(Insn, 4, 2)) {
4378 static DecodeStatus DecodeVST1LN(MCInst &Inst, unsigned Insn,
4382 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
4383 unsigned Rm = fieldFromInstruction(Insn, 0, 4);
4384 unsigned Rd = fieldFromInstruction(Insn, 12, 4);
4385 Rd |= fieldFromInstruction(Insn, 22, 1) << 4;
4386 unsigned size = fieldFromInstruction(Insn, 10, 2);
4394 if (fieldFromInstruction(Insn, 4, 1))
4396 index = fieldFromInstruction(Insn, 5, 3);
4399 if (fieldFromInstruction(Insn, 5, 1))
4401 index = fieldFromInstruction(Insn, 6, 2);
4402 if (fieldFromInstruction(Insn, 4, 1))
4406 if (fieldFromInstruction(Insn, 6, 1))
4408 index = fieldFromInstruction(Insn, 7, 1);
4410 switch (fieldFromInstruction(Insn, 4, 2)) {
4444 static DecodeStatus DecodeVLD2LN(MCInst &Inst, unsigned Insn,
4448 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
4449 unsigned Rm = fieldFromInstruction(Insn, 0, 4);
4450 unsigned Rd = fieldFromInstruction(Insn, 12, 4);
4451 Rd |= fieldFromInstruction(Insn, 22, 1) << 4;
4452 unsigned size = fieldFromInstruction(Insn, 10, 2);
4461 index = fieldFromInstruction(Insn, 5, 3);
4462 if (fieldFromInstruction(Insn, 4, 1))
4466 index = fieldFromInstruction(Insn, 6, 2);
4467 if (fieldFromInstruction(Insn, 4, 1))
4469 if (fieldFromInstruction(Insn, 5, 1))
4473 if (fieldFromInstruction(Insn, 5, 1))
4475 index = fieldFromInstruction(Insn, 7, 1);
4476 if (fieldFromInstruction(Insn, 4, 1) != 0)
4478 if (fieldFromInstruction(Insn, 6, 1))
4511 static DecodeStatus DecodeVST2LN(MCInst &Inst, unsigned Insn,
4515 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
4516 unsigned Rm = fieldFromInstruction(Insn, 0, 4);
4517 unsigned Rd = fieldFromInstruction(Insn, 12, 4);
4518 Rd |= fieldFromInstruction(Insn, 22, 1) << 4;
4519 unsigned size = fieldFromInstruction(Insn, 10, 2);
4528 index = fieldFromInstruction(Insn, 5, 3);
4529 if (fieldFromInstruction(Insn, 4, 1))
4533 index = fieldFromInstruction(Insn, 6, 2);
4534 if (fieldFromInstruction(Insn, 4, 1))
4536 if (fieldFromInstruction(Insn, 5, 1))
4540 if (fieldFromInstruction(Insn, 5, 1))
4542 index = fieldFromInstruction(Insn, 7, 1);
4543 if (fieldFromInstruction(Insn, 4, 1) != 0)
4545 if (fieldFromInstruction(Insn, 6, 1))
4575 static DecodeStatus DecodeVLD3LN(MCInst &Inst, unsigned Insn,
4579 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
4580 unsigned Rm = fieldFromInstruction(Insn, 0, 4);
4581 unsigned Rd = fieldFromInstruction(Insn, 12, 4);
4582 Rd |= fieldFromInstruction(Insn, 22, 1) << 4;
4583 unsigned size = fieldFromInstruction(Insn, 10, 2);
4592 if (fieldFromInstruction(Insn, 4, 1))
4594 index = fieldFromInstruction(Insn, 5, 3);
4597 if (fieldFromInstruction(Insn, 4, 1))
4599 index = fieldFromInstruction(Insn, 6, 2);
4600 if (fieldFromInstruction(Insn, 5, 1))
4604 if (fieldFromInstruction(Insn, 4, 2))
4606 index = fieldFromInstruction(Insn, 7, 1);
4607 if (fieldFromInstruction(Insn, 6, 1))
4645 static DecodeStatus DecodeVST3LN(MCInst &Inst, unsigned Insn,
4649 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
4650 unsigned Rm = fieldFromInstruction(Insn, 0, 4);
4651 unsigned Rd = fieldFromInstruction(Insn, 12, 4);
4652 Rd |= fieldFromInstruction(Insn, 22, 1) << 4;
4653 unsigned size = fieldFromInstruction(Insn, 10, 2);
4662 if (fieldFromInstruction(Insn, 4, 1))
4664 index = fieldFromInstruction(Insn, 5, 3);
4667 if (fieldFromInstruction(Insn, 4, 1))
4669 index = fieldFromInstruction(Insn, 6, 2);
4670 if (fieldFromInstruction(Insn, 5, 1))
4674 if (fieldFromInstruction(Insn, 4, 2))
4676 index = fieldFromInstruction(Insn, 7, 1);
4677 if (fieldFromInstruction(Insn, 6, 1))
4709 static DecodeStatus DecodeVLD4LN(MCInst &Inst, unsigned Insn,
4713 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
4714 unsigned Rm = fieldFromInstruction(Insn, 0, 4);
4715 unsigned Rd = fieldFromInstruction(Insn, 12, 4);
4716 Rd |= fieldFromInstruction(Insn, 22, 1) << 4;
4717 unsigned size = fieldFromInstruction(Insn, 10, 2);
4726 if (fieldFromInstruction(Insn, 4, 1))
4728 index = fieldFromInstruction(Insn, 5, 3);
4731 if (fieldFromInstruction(Insn, 4, 1))
4733 index = fieldFromInstruction(Insn, 6, 2);
4734 if (fieldFromInstruction(Insn, 5, 1))
4738 switch (fieldFromInstruction(Insn, 4, 2)) {
4744 align = 4 << fieldFromInstruction(Insn, 4, 2); break;
4747 index = fieldFromInstruction(Insn, 7, 1);
4748 if (fieldFromInstruction(Insn, 6, 1))
4790 static DecodeStatus DecodeVST4LN(MCInst &Inst, unsigned Insn,
4794 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
4795 unsigned Rm = fieldFromInstruction(Insn, 0, 4);
4796 unsigned Rd = fieldFromInstruction(Insn, 12, 4);
4797 Rd |= fieldFromInstruction(Insn, 22, 1) << 4;
4798 unsigned size = fieldFromInstruction(Insn, 10, 2);
4807 Insn, 4, 1))
4809 index = fieldFromInstruction(Insn, 5, 3);
4812 if (fieldFromInstruction(Insn, 4, 1))
4814 index = fieldFromInstruction(Insn, 6, 2);
4815 if (fieldFromInstruction(Insn, 5, 1))
4819 switch (fieldFromInstruction(Insn, 4, 2)) {
4825 align = 4 << fieldFromInstruction(Insn, 4, 2); break;
4828 index = fieldFromInstruction(Insn, 7, 1);
4829 if (fieldFromInstruction(Insn, 6, 1))
4862 static DecodeStatus DecodeVMOVSRR(MCInst &Inst, unsigned Insn,
4865 unsigned Rt = fieldFromInstruction(Insn, 12, 4);
4866 unsigned Rt2 = fieldFromInstruction(Insn, 16, 4);
4867 unsigned Rm = fieldFromInstruction(Insn, 5, 1);
4868 unsigned pred = fieldFromInstruction(Insn, 28, 4);
4869 Rm |= fieldFromInstruction(Insn, 0, 4) << 1;
4888 static DecodeStatus DecodeVMOVRRS(MCInst &Inst, unsigned Insn,
4891 unsigned Rt = fieldFromInstruction(Insn, 12, 4);
4892 unsigned Rt2 = fieldFromInstruction(Insn, 16, 4);
4893 unsigned Rm = fieldFromInstruction(Insn, 5, 1);
4894 unsigned pred = fieldFromInstruction(Insn, 28, 4);
4895 Rm |= fieldFromInstruction(Insn, 0, 4) << 1;
4914 static DecodeStatus DecodeIT(MCInst &Inst, unsigned Insn,
4917 unsigned pred = fieldFromInstruction(Insn, 4, 4);
4918 unsigned mask = fieldFromInstruction(Insn, 0, 4);
4934 DecodeT2LDRDPreInstruction(MCInst &Inst, unsigned Insn,
4938 unsigned Rt = fieldFromInstruction(Insn, 12, 4);
4939 unsigned Rt2 = fieldFromInstruction(Insn, 8, 4);
4940 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
4941 unsigned addr = fieldFromInstruction(Insn, 0, 8);
4942 unsigned W = fieldFromInstruction(Insn, 21, 1);
4943 unsigned U = fieldFromInstruction(Insn, 23, 1);
4944 unsigned P = fieldFromInstruction(Insn, 24, 1);
4971 DecodeT2STRDPreInstruction(MCInst &Inst, unsigned Insn,
4975 unsigned Rt = fieldFromInstruction(Insn, 12, 4);
4976 unsigned Rt2 = fieldFromInstruction(Insn, 8, 4);
4977 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
4978 unsigned addr = fieldFromInstruction(Insn, 0, 8);
4979 unsigned W = fieldFromInstruction(Insn, 21, 1);
4980 unsigned U = fieldFromInstruction(Insn, 23, 1);
4981 unsigned P = fieldFromInstruction(Insn, 24, 1);
5005 static DecodeStatus DecodeT2Adr(MCInst &Inst, uint32_t Insn,
5007 unsigned sign1 = fieldFromInstruction(Insn, 21, 1);
5008 unsigned sign2 = fieldFromInstruction(Insn, 23, 1);
5011 unsigned Val = fieldFromInstruction(Insn, 0, 8);
5012 Val |= fieldFromInstruction(Insn, 12, 3) << 8;
5013 Val |= fieldFromInstruction(Insn, 26, 1) << 11;
5031 static DecodeStatus DecodeSwap(MCInst &Inst, unsigned Insn,
5033 unsigned Rt = fieldFromInstruction(Insn, 12, 4);
5034 unsigned Rt2 = fieldFromInstruction(Insn, 0, 4);
5035 unsigned Rn = fieldFromInstruction(Insn, 16, 4);
5036 unsigned pred = fieldFromInstruction(Insn, 28, 4);
5039 return DecodeCPSInstruction(Inst, Insn, Address, Decoder);
5058 static DecodeStatus DecodeVCVTD(MCInst &Inst, unsigned Insn,
5060 unsigned Vd = (fieldFromInstruction(Insn, 12, 4) << 0);
5061 Vd |= (fieldFromInstruction(Insn, 22, 1) << 4);
5062 unsigned Vm = (fieldFromInstruction(Insn, 0, 4) << 0);
5063 Vm |= (fieldFromInstruction(Insn, 5, 1) << 4);
5064 unsigned imm = fieldFromInstruction(Insn, 16, 6);
5065 unsigned cmode = fieldFromInstruction(Insn, 8, 4);
5066 unsigned op = fieldFromInstruction(Insn, 5, 1);
5074 return DecodeNEONModImmInstruction(Inst, Insn, Address, Decoder);
5088 static DecodeStatus DecodeVCVTQ(MCInst &Inst, unsigned Insn,
5090 unsigned Vd = (fieldFromInstruction(Insn, 12, 4) << 0);
5091 Vd |= (fieldFromInstruction(Insn, 22, 1) << 4);
5092 unsigned Vm = (fieldFromInstruction(Insn, 0, 4) << 0);
5093 Vm |= (fieldFromInstruction(Insn, 5, 1) << 4);
5094 unsigned imm = fieldFromInstruction(Insn, 16, 6);
5095 unsigned cmode = fieldFromInstruction(Insn, 8, 4);
5096 unsigned op = fieldFromInstruction(Insn, 5, 1);
5104 return DecodeNEONModImmInstruction(Inst, Insn, Address, Decoder);
