Lines Matching refs:v2i16
167 } else if (LocVT == MVT::v4i8 || LocVT == MVT::v2i16) {
248 } else if (LocVT == MVT::v4i8 || LocVT == MVT::v2i16) {
1005 if (LHSVT == MVT::v2i16) {
1049 if (OpVT == MVT::v2i16) {
1053 SDValue TR = DAG.getNode(ISD::TRUNCATE, DL, MVT::v2i16, SL);
1265 addRegisterClass(MVT::v2i16, &Hexagon::IntRegsRegClass);
1267 promoteLdStType(MVT::v2i16, MVT::i32);
1352 setOperationAction(ISD::SETCC, MVT::v2i16, Custom);
1353 setOperationAction(ISD::VSELECT, MVT::v2i16, Custom);
2056 // Try to generate a S2_packhl to build v2i16 vectors.
2057 if (VT.getSimpleVT() == MVT::v2i16) {
2068 return DAG.getTargetExtractSubreg(Hexagon::subreg_loreg, dl, MVT::v2i16,
2159 if ((VecVT.getSimpleVT() == MVT::v2i16) && (NElts == 2) && W && S) {
2161 // We are trying to concat two v2i16 to a single v4i16.
2237 // v4i16 -> v2i16/i32 vselect.
