Lines Matching refs:MachineBasicBlock
120 HexagonInstrInfo::InsertBranch(MachineBasicBlock &MBB,MachineBasicBlock *TBB,
121 MachineBasicBlock *FBB,
145 MachineBasicBlock *NewTBB, *NewFBB;
150 MachineBasicBlock *NextBB =
177 bool HexagonInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB,
178 MachineBasicBlock *&TBB,
179 MachineBasicBlock *&FBB,
186 MachineBasicBlock::instr_iterator I = MBB.instr_end();
320 unsigned HexagonInstrInfo::RemoveBranch(MachineBasicBlock &MBB) const {
321 MachineBasicBlock::iterator I = MBB.end();
427 void HexagonInstrInfo::copyPhysReg(MachineBasicBlock &MBB,
428 MachineBasicBlock::iterator I, DebugLoc DL,
484 storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
531 loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
568 HexagonInstrInfo::expandPostRAPseudo(MachineBasicBlock::iterator MI) const {
571 MachineBasicBlock &MBB = *MI->getParent();
1027 isProfitableToIfCvt(MachineBasicBlock &MBB,
1037 isProfitableToIfCvt(MachineBasicBlock &TMBB,
1040 MachineBasicBlock &FMBB,
1148 isProfitableToDupForIfCvt(MachineBasicBlock &MBB,unsigned NumInstrs,
1716 const MachineBasicBlock *MBB,
1786 MachineBasicBlock *Src = MI->getParent();
1788 MachineBasicBlock *Dst = BrTarget->getMBB();
