Lines Matching full:b110
185 def A4_cmpbeq : T_CMP_rrbh<"cmpb.eq", 0b110, 1>;
460 let Inst{27-25} = 0b110;
615 defm loadrd : ld_idxd_shl<"memd", "LDrid", DoubleRegs, 0b110>;
705 0b110, DoubleWordAccess>;
773 def S4_storerd_ur : T_StoreAbsReg <"memd", "STrid", DoubleRegs, 0b110,
1006 defm storerd: ST_Idxd_shl<"memd", "STrid", DoubleRegs, 0b110>;
1057 let Inst{27-25} = 0b110;
1367 let Inst{27-25} = 0b110;
1972 def S4_vxsubaddh : T_S3op_64 < "vxsubaddh", 0b01, 0b110, 0, 1>;
2079 def A4_bitspliti : T_S2op_2_di <"bitsplit", 0b110, 0b100>;
2087 def A4_round_ri_sat : T_S2op_2_ii <"round", 0b111, 0b110, 1>;
2195 def M4_or_xor : T_MType_acc_rr < "|= xor", 0b110, 0b001, 0>;
2199 def M4_xor_or : T_MType_acc_rr < "^= or", 0b110, 0b011, 0>;
2202 def M4_or_or : T_MType_acc_rr < "|= or", 0b110, 0b000, 0>;
2206 def M4_xor_and : T_MType_acc_rr < "^= and", 0b110, 0b010, 0>;
2307 def S2_brevp : T_S2op_3 <"brev", 0b11, 0b110>;
2507 def M4_vrmpyeh_s1 : T_M2_vmpy<"vrmpyweh", 0b110, 0b100, 1, 0, 0>;
2514 def M4_vrmpyeh_acc_s0: T_M2_vmpy_acc<"vrmpyweh", 0b001, 0b110, 0, 0>;
2515 def M4_vrmpyeh_acc_s1: T_M2_vmpy_acc<"vrmpyweh", 0b101, 0b110, 1, 0>;
2518 def M4_vrmpyoh_acc_s0: T_M2_vmpy_acc<"vrmpywoh", 0b011, 0b110, 0, 0>;
2519 def M4_vrmpyoh_acc_s1: T_M2_vmpy_acc<"vrmpywoh", 0b111, 0b110, 1, 0>;
2532 def M4_vpmpyh : T_XTYPE_mpy64 < "vpmpyh", 0b110, 0b111, 0, 0, 0>;
2679 def M4_cmpyr_wh : T_S3op_8<"cmpyrwh", 0b110, 1, 1, 1>;
2704 def A4_addp_c : T_S3op_carry < "add", 0b110 >;
2744 def A4_vrminw : T_S3op_6 < "vrminw", 0b110, 0>;
2745 def A4_vrminuw : T_S3op_6 < "vrminuw", 0b110, 1>;
3700 defm loadrd : LD_Abs<"memd", "LDrid", DoubleRegs, u16_3Imm, 0b110>;
3730 def L2_loadrdgp : T_LoadGP<"memd", "LDrid", DoubleRegs, u16_3Imm, 0b110>;
