Lines Matching refs:contains
10 // This file contains the Mips32/64 implementation of the TargetInstrInfo class.
86 if (Mips::GPR32RegClass.contains(DestReg)) { // Copy to CPU Reg.
87 if (Mips::GPR32RegClass.contains(SrcReg)) {
92 } else if (Mips::CCRRegClass.contains(SrcReg))
94 else if (Mips::FGR32RegClass.contains(SrcReg))
96 else if (Mips::HI32RegClass.contains(SrcReg)) {
99 } else if (Mips::LO32RegClass.contains(SrcReg)) {
102 } else if (Mips::HI32DSPRegClass.contains(SrcReg))
104 else if (Mips::LO32DSPRegClass.contains(SrcReg))
106 else if (Mips::DSPCCRegClass.contains(SrcReg)) {
111 else if (Mips::MSACtrlRegClass.contains(SrcReg))
114 else if (Mips::GPR32RegClass.contains(SrcReg)) { // Copy from CPU Reg.
115 if (Mips::CCRRegClass.contains(DestReg))
117 else if (Mips::FGR32RegClass.contains(DestReg))
119 else if (Mips::HI32RegClass.contains(DestReg))
121 else if (Mips::LO32RegClass.contains(DestReg))
123 else if (Mips::HI32DSPRegClass.contains(DestReg))
125 else if (Mips::LO32DSPRegClass.contains(DestReg))
127 else if (Mips::DSPCCRegClass.contains(DestReg)) {
133 else if (Mips::MSACtrlRegClass.contains(DestReg))
136 else if (Mips::FGR32RegClass.contains(DestReg, SrcReg))
138 else if (Mips::AFGR64RegClass.contains(DestReg, SrcReg))
140 else if (Mips::FGR64RegClass.contains(DestReg, SrcReg))
142 else if (Mips::GPR64RegClass.contains(DestReg)) { // Copy to CPU64 Reg.
143 if (Mips::GPR64RegClass.contains(SrcReg))
145 else if (Mips::HI64RegClass.contains(SrcReg))
147 else if (Mips::LO64RegClass.contains(SrcReg))
149 else if (Mips::FGR64RegClass.contains(SrcReg))
152 else if (Mips::GPR64RegClass.contains(SrcReg)) { // Copy from CPU64 Reg.
153 if (Mips::HI64RegClass.contains(DestReg))
155 else if (Mips::LO64RegClass.contains(DestReg))
157 else if (Mips::FGR64RegClass.contains(DestReg))
160 else if (Mips::MSA128BRegClass.contains(DestReg)) { // Copy to MSA reg
161 if (Mips::MSA128BRegClass.contains(SrcReg))
