Lines Matching defs:Load
86 // Find a larger type to do a load / store of a vector with.
145 // Lower floating point store/load to integer store/load to reduce the number
187 setOperationAction(ISD::LOAD, MVT::f32, Promote);
188 AddPromotedToType(ISD::LOAD, MVT::f32, MVT::i32);
190 setOperationAction(ISD::LOAD, MVT::v2f32, Promote);
191 AddPromotedToType(ISD::LOAD, MVT::v2f32, MVT::v2i32);
193 setOperationAction(ISD::LOAD, MVT::v4f32, Promote);
194 AddPromotedToType(ISD::LOAD, MVT::v4f32, MVT::v4i32);
196 setOperationAction(ISD::LOAD, MVT::v8f32, Promote);
197 AddPromotedToType(ISD::LOAD, MVT::v8f32, MVT::v8i32);
199 setOperationAction(ISD::LOAD, MVT::v16f32, Promote);
200 AddPromotedToType(ISD::LOAD, MVT::v16f32, MVT::v16i32);
202 setOperationAction(ISD::LOAD, MVT::f64, Promote);
203 AddPromotedToType(ISD::LOAD, MVT::f64, MVT::i64);
205 setOperationAction(ISD::LOAD, MVT::v2f64, Promote);
206 AddPromotedToType(ISD::LOAD, MVT::v2f64, MVT::v2i64);
456 // If we are reducing to a 32-bit load, this is always better.
465 // still couldn't use a scalar load, using the wider load shouldn't really
532 // Any register load of a 64-bit value really requires 2 32-bit moves. For all
533 // practical purposes, the extra mov 0 to load a 64-bit is free. As used,
638 case ISD::LOAD: {
667 // runtime will load into a buffer before the kernel is executed. Uses of the
814 if (I->getOpcode() != AMDGPUISD::REGISTER_LOAD && I->getOpcode() != ISD::LOAD)
1188 LoadSDNode *Load = cast<LoadSDNode>(Op);
1189 EVT MemVT = Load->getMemoryVT();
1194 EVT PtrVT = Load->getBasePtr().getValueType();
1196 unsigned NumElts = Load->getMemoryVT().getVectorNumElements();
1202 MachinePointerInfo SrcValue(Load->getMemOperand()->getValue());
1205 SDValue Ptr = DAG.getNode(ISD::ADD, SL, PtrVT, Load->getBasePtr(),
1209 = DAG.getExtLoad(Load->getExtensionType(), SL, EltVT,
1210 Load->getChain(), Ptr,
1212 MemEltVT, Load->isVolatile(), Load->isNonTemporal(),
1213 Load->isInvariant(), Load->getAlignment());
1235 LoadSDNode *Load = cast<LoadSDNode>(Op);
1236 SDValue BasePtr = Load->getBasePtr();
1238 EVT MemVT = Load->getMemoryVT();
1240 MachinePointerInfo SrcValue(Load->getMemOperand()->getValue());
1250 = DAG.getExtLoad(Load->getExtensionType(), SL, LoVT,
1251 Load->getChain(), BasePtr,
1253 LoMemVT, Load->isVolatile(), Load->isNonTemporal(),
1254 Load->isInvariant(), Load->getAlignment());
1260 = DAG.getExtLoad(Load->getExtensionType(), SL, HiVT,
1261 Load->getChain(), HiPtr,
1263 HiMemVT, Load->isVolatile(), Load->isNonTemporal(),
1264 Load->isInvariant(), Load->getAlignment());
1417 LoadSDNode *Load = cast<LoadSDNode>(Op);
1418 ISD::LoadExtType ExtType = Load->getExtensionType();
1420 EVT MemVT = Load->getMemoryVT();
1425 // First, load into 32 bits, then truncate to 1 bit.
1427 SDValue Chain = Load->getChain();
1428 SDValue BasePtr = Load->getBasePtr();
1429 MachineMemOperand *MMO = Load->getMemOperand();
1443 Load->getAddressSpace() != AMDGPUAS::PRIVATE_ADDRESS ||
1444 ExtType == ISD::NON_EXTLOAD || Load->getMemoryVT().bitsGE(MVT::i32))
1448 SDValue Ptr = DAG.getNode(ISD::SRL, DL, MVT::i32, Load->getBasePtr(),
1451 Load->getChain(), Ptr,
1455 Load->getBasePtr(),
1468 Load->getChain()
1476 Load->getChain()
2328 // If we have a copy of an illegal type, replace it with a load / store of an
