Lines Matching full:must
36 /// The version of the amd_*_code_t struct. Minor versions must be
60 /// (AMD_CODE_PROPERTY_*_SHIFT) for convenient access. Unused bits must be 0.
72 /// The total number of SGPRuser data registers requested must not
126 /// code for private memory. This must be 2, 4, 8 or 16. This value
133 /// element size is 4 (32-bits or dword) and a 64-bit value must be
141 /// The value used must match the value that the runtime configures
150 /// Are global memory addresses 64 bits. Must match
152 /// HSA_MACHINE_LARGE. Must also match
165 /// know private segment size, and additional space must be added
191 /// enabled in this bit set must have the value of all 0s.
194 /// If enableBreakExceptions is not enabled then must be 0, otherwise must be
195 /// non-0 and specifies the set of HSAIL exceptions that must have the BREAK
201 /// enablebreakexceptions control directive, then they must be equal or a
205 /// If enableDetectExceptions is not enabled then must be 0, otherwise must be
206 /// non-0 and specifies the set of HSAIL exceptions that must have the DETECT
213 /// enabledetectexceptions control directive, then they must be equal or a
217 /// If maxDynamicGroupSize is not enabled then must be 0, and any amount of
221 /// maxdynamicsize control directives, then the values must be the same, and
222 /// must be the same as this argument if it is enabled. This value can be used
234 /// If maxFlatGridSize is not enabled then must be 0, otherwise must be greater
239 /// If maxFlatWorkgroupSize is not enabled then must be 0, otherwise must be
244 /// If requestedWorkgroupsPerCu is not enabled then must be 0, and the
251 /// must be the same. This can be used to determine the number of resources
261 /// If not enabled then all elements for Dim3 must be 0, otherwise every
262 /// element must be greater than 0. See HSA Programmer's Reference Manual
266 /// If requiredWorkgroupSize is not enabled then all elements for Dim3 must be
268 /// consistent with the dispatch dimensions. Otherwise, the code produced must
270 /// specified range must be 0. It must be consistent with required_dimensions
273 /// values must be the same. Specifying a value can allow the finalizer to
279 /// If requiredDim is not enabled then must be 0 and the produced kernel code
281 /// 1..3 and the code produced must only be dispatched with a dimension that
284 /// values must be the same. This can be used to optimize the code generated to
289 /// Reserved. Must be 0.
321 /// segments using a segment address. It must be set as follows:
328 /// - Swizzle enable: SH_STATIC_MEM_CONFIG.SWIZZLE_ENABLE (must be 1 for
333 /// - Element_size: SH_STATIC_MEM_CONFIG.ELEMENT_SIZE (will be DWORD, must
335 /// - Index_stride: SH_STATIC_MEM_CONFIG.INDEX_STRIDE (will be 64 as must
336 /// be number of wavefront lanes for scratch, must agree with
369 /// Scratch Wave Offset must be added by the kernel code and moved to
378 /// The kernel code must move to SGPRn-3 for use as the FLAT SCRATCH SIZE in
442 /// dispatch scratch base. Must be used as an offset with Private/Spill/Arg
443 /// segment address when using Scratch Segment Buffer. It must be added to
497 /// When the Global Buffer is used to access the Kernarg segment, must add the
503 /// The AMD major version of the Code Object. Must be the value
507 /// The AMD minor version of the Code Object. Minor versions must be
508 /// backward compatible. Must be the value
512 /// The byte size of this struct. Must be set to
525 /// requirements (SQ cache line is 16). The code must be position
551 /// the Finalizer has not computed this value, it must be 0.
564 /// is_dynamic_callstack is 1 then additional space must be added to
574 /// Number of byte of GDS required by kernel dispatch. Must be 0 if
585 /// fbarriers then that amount must already be included in the
599 /// If reserved_vgpr_count is 0 then must be 0. Otherwise, this is the
608 /// If reserved_sgpr_count is 0 then must be 0. Otherwise, this is the
617 /// If is_debug_supported is 0 then must be 0. Otherwise, this is the
623 /// If is_debug_supported is 0 then must be 0. Otherwise, this is the
630 /// the specified memory segment. Expressed as a power of two. Must
642 /// There are currently no code properties so this field must be 0.
645 /// Wavefront size expressed as a power of two. Must be a power of 2
659 /// unit then must be 0.
664 /// not generated from an HSAIL compilation unit then must still
670 /// generated from an HSAIL compilation unit then must be 0.
675 /// generated from an HSAIL compilation unit then must be 0.
680 /// must be 0.
683 /// Reserved. Must be 0.
