Lines Matching refs:contains
336 if (AMDGPU::SReg_32RegClass.contains(DestReg)) {
337 assert(AMDGPU::SReg_32RegClass.contains(SrcReg));
342 } else if (AMDGPU::SReg_64RegClass.contains(DestReg)) {
344 if (AMDGPU::SReg_64RegClass.contains(SrcReg)) {
349 assert(AMDGPU::VGPR_32RegClass.contains(SrcReg));
358 assert(AMDGPU::SReg_64RegClass.contains(SrcReg));
363 } else if (AMDGPU::SReg_128RegClass.contains(DestReg)) {
364 assert(AMDGPU::SReg_128RegClass.contains(SrcReg));
368 } else if (AMDGPU::SReg_256RegClass.contains(DestReg)) {
369 assert(AMDGPU::SReg_256RegClass.contains(SrcReg));
373 } else if (AMDGPU::SReg_512RegClass.contains(DestReg)) {
374 assert(AMDGPU::SReg_512RegClass.contains(SrcReg));
378 } else if (AMDGPU::VGPR_32RegClass.contains(DestReg)) {
379 assert(AMDGPU::VGPR_32RegClass.contains(SrcReg) ||
380 AMDGPU::SReg_32RegClass.contains(SrcReg));
385 } else if (AMDGPU::VReg_64RegClass.contains(DestReg)) {
386 assert(AMDGPU::VReg_64RegClass.contains(SrcReg) ||
387 AMDGPU::SReg_64RegClass.contains(SrcReg));
391 } else if (AMDGPU::VReg_96RegClass.contains(DestReg)) {
392 assert(AMDGPU::VReg_96RegClass.contains(SrcReg));
396 } else if (AMDGPU::VReg_128RegClass.contains(DestReg)) {
397 assert(AMDGPU::VReg_128RegClass.contains(SrcReg) ||
398 AMDGPU::SReg_128RegClass.contains(SrcReg));
402 } else if (AMDGPU::VReg_256RegClass.contains(DestReg)) {
403 assert(AMDGPU::VReg_256RegClass.contains(SrcReg) ||
404 AMDGPU::SReg_256RegClass.contains(SrcReg));
408 } else if (AMDGPU::VReg_512RegClass.contains(DestReg)) {
409 assert(AMDGPU::VReg_512RegClass.contains(SrcReg) ||
410 AMDGPU::SReg_512RegClass.contains(SrcReg));
1248 (AMDGPU::SGPR_32RegClass.contains(MO.getReg()) ||
1249 AMDGPU::SGPR_64RegClass.contains(MO.getReg())))) {
1320 if (!RC->contains(Reg)) {
