Lines Matching defs:Load
424 // If it is double-word aligned, just load.
430 SDValue Load = DAG.getLoad(VA.getValVT(), dl, Chain, FIPtr,
433 InVals.push_back(Load);
464 SDValue Load ;
466 Load = DAG.getLoad(VA.getValVT(), dl, Chain, FIPtr,
475 Load = DAG.getExtLoad(LoadOp, dl, MVT::i32, Chain, FIPtr,
478 Load = DAG.getNode(ISD::TRUNCATE, dl, VA.getValVT(), Load);
480 InVals.push_back(Load);
815 // Load the low part.
1144 // Load into Reg and Reg+1
1380 // Turn FP extload into load/fextend
1386 // Sparc doesn't have i1 sign extending load
1497 // Custom Lower Atomic LOAD/STORE
1588 setOperationAction(ISD::LOAD, MVT::f128, Legal);
1591 setOperationAction(ISD::LOAD, MVT::f128, Custom);
2048 // Load RetPtr to get the return value.
2395 // Load the actual argument out of the pointer VAList.
2545 // Lower a f128 load into two f64 loads.
2770 // Monotonic load/stores are legal.
2813 case ISD::LOAD: return LowerF128Load(Op, DAG);
2984 // %val0 = load %addr
