Lines Matching defs:SPCC
1325 static SPCC::CondCodes IntCondCCodeToICC(ISD::CondCode CC) {
1328 case ISD::SETEQ: return SPCC::ICC_E;
1329 case ISD::SETNE: return SPCC::ICC_NE;
1330 case ISD::SETLT: return SPCC::ICC_L;
1331 case ISD::SETGT: return SPCC::ICC_G;
1332 case ISD::SETLE: return SPCC::ICC_LE;
1333 case ISD::SETGE: return SPCC::ICC_GE;
1334 case ISD::SETULT: return SPCC::ICC_CS;
1335 case ISD::SETULE: return SPCC::ICC_LEU;
1336 case ISD::SETUGT: return SPCC::ICC_GU;
1337 case ISD::SETUGE: return SPCC::ICC_CC;
1343 static SPCC::CondCodes FPCondCCodeToFCC(ISD::CondCode CC) {
1347 case ISD::SETOEQ: return SPCC::FCC_E;
1349 case ISD::SETUNE: return SPCC::FCC_NE;
1351 case ISD::SETOLT: return SPCC::FCC_L;
1353 case ISD::SETOGT: return SPCC::FCC_G;
1355 case ISD::SETOLE: return SPCC::FCC_LE;
1357 case ISD::SETOGE: return SPCC::FCC_GE;
1358 case ISD::SETULT: return SPCC::FCC_UL;
1359 case ISD::SETULE: return SPCC::FCC_ULE;
1360 case ISD::SETUGT: return SPCC::FCC_UG;
1361 case ISD::SETUGE: return SPCC::FCC_UGE;
1362 case ISD::SETUO: return SPCC::FCC_U;
1363 case ISD::SETO: return SPCC::FCC_O;
1364 case ISD::SETONE: return SPCC::FCC_LG;
1365 case ISD::SETUEQ: return SPCC::FCC_UE;
1739 // set LHS/RHS and SPCC to the LHS/RHS of the setcc and SPCC to the condition.
1741 ISD::CondCode CC, unsigned &SPCC) {
1755 SPCC = cast<ConstantSDNode>(LHS.getOperand(2))->getZExtValue();
2059 unsigned &SPCC,
2065 switch(SPCC) {
2067 case SPCC::FCC_E : LibCall = is64Bit? "_Qp_feq" : "_Q_feq"; break;
2068 case SPCC::FCC_NE : LibCall = is64Bit? "_Qp_fne" : "_Q_fne"; break;
2069 case SPCC::FCC_L : LibCall = is64Bit? "_Qp_flt" : "_Q_flt"; break;
2070 case SPCC::FCC_G : LibCall = is64Bit? "_Qp_fgt" : "_Q_fgt"; break;
2071 case SPCC::FCC_LE : LibCall = is64Bit? "_Qp_fle" : "_Q_fle"; break;
2072 case SPCC::FCC_GE : LibCall = is64Bit? "_Qp_fge" : "_Q_fge"; break;
2073 case SPCC::FCC_UL :
2074 case SPCC::FCC_ULE:
2075 case SPCC::FCC_UG :
2076 case SPCC::FCC_UGE:
2077 case SPCC::FCC_U :
2078 case SPCC::FCC_O :
2079 case SPCC::FCC_LG :
2080 case SPCC::FCC_UE : LibCall = is64Bit? "_Qp_cmp" : "_Q_cmp"; break;
2099 switch(SPCC) {
2102 SPCC = SPCC::ICC_NE;
2105 case SPCC::FCC_UL : {
2109 SPCC = SPCC::ICC_NE;
2112 case SPCC::FCC_ULE: {
2114 SPCC = SPCC::ICC_NE;
2117 case SPCC::FCC_UG : {
2119 SPCC = SPCC::ICC_G;
2122 case SPCC::FCC_UGE: {
2124 SPCC = SPCC::ICC_NE;
2128 case SPCC::FCC_U : {
2130 SPCC = SPCC::ICC_E;
2133 case SPCC::FCC_O : {
2135 SPCC = SPCC::ICC_NE;
2138 case SPCC::FCC_LG : {
2142 SPCC = SPCC::ICC_NE;
2145 case SPCC::FCC_UE : {
2149 SPCC = SPCC::ICC_E;
2295 unsigned Opc, SPCC = ~0U;
2299 LookThroughSetCC(LHS, RHS, CC, SPCC);
2305 if (SPCC == ~0U) SPCC = IntCondCCodeToICC(CC);
2310 if (SPCC == ~0U) SPCC = FPCondCCodeToFCC(CC);
2311 CompareFlag = TLI.LowerF128Compare(LHS, RHS, SPCC, dl, DAG);
2315 if (SPCC == ~0U) SPCC = FPCondCCodeToFCC(CC);
2320 DAG.getConstant(SPCC, MVT::i32), CompareFlag);
2332 unsigned Opc, SPCC = ~0U;
2336 LookThroughSetCC(LHS, RHS, CC, SPCC);
2343 if (SPCC == ~0U) SPCC = IntCondCCodeToICC(CC);
2346 if (SPCC == ~0U) SPCC = FPCondCCodeToFCC(CC);
2347 CompareFlag = TLI.LowerF128Compare(LHS, RHS, SPCC, dl, DAG);
2352 if (SPCC == ~0U) SPCC = FPCondCCodeToFCC(CC);
2356 DAG.getConstant(SPCC, MVT::i32), CompareFlag);
2885 return expandAtomicRMW(MI, BB, SP::MOVICCrr, SPCC::ICC_G);
2887 return expandAtomicRMW(MI, BB, SP::MOVXCCrr, SPCC::ICC_G);
2889 return expandAtomicRMW(MI, BB, SP::MOVICCrr, SPCC::ICC_LE);
2891 return expandAtomicRMW(MI, BB, SP::MOVXCCrr, SPCC::ICC_LE);
2893 return expandAtomicRMW(MI, BB, SP::MOVICCrr, SPCC::ICC_GU);
2895 return expandAtomicRMW(MI, BB, SP::MOVXCCrr, SPCC::ICC_GU);
2897 return expandAtomicRMW(MI, BB, SP::MOVICCrr, SPCC::ICC_LEU);
2899 return expandAtomicRMW(MI, BB, SP::MOVXCCrr, SPCC::ICC_LEU);
2909 unsigned CC = (SPCC::CondCodes)MI->getOperand(3).getImm();
3052 .addMBB(LoopMBB).addImm(SPCC::ICC_NE);
