Lines Matching defs:true
142 setUseUnderscoreSetJmp(true);
145 setUseUnderscoreSetJmp(true);
146 setUseUnderscoreLongJmp(true);
1576 EnableExtLdPromotion = true;
1690 /// true, that means it's expanding a memset. If 'ZeroMemset' is true, that
1736 return true;
1746 return true;
1840 return true;
2022 HasRet = true;
2029 return true;
2150 /*isVolatile*/false, /*AlwaysInline=*/true,
2155 /// Return true if the calling convention is one that
2162 /// \brief Return true if the calling convention is a C calling convention.
2177 return true;
2180 /// Return true if the function is being made into
2293 FuncInfo->setForceFramePointer(true);
2424 MFI->CreateFixedObject(1, StackSize, true));
2542 /*isVolatile=*/true, /*isNonTemporal=*/false, /*Alignment=*/0);
2616 /*isVolatile=*/true,
2705 isTailCall = true;
2716 IsSibcall = true;
2776 Chain, DAG.getIntPtrConstant(NumBytesToPush, true), dl);
2947 FI = MF.getFrameInfo()->CreateFixedObject(OpSize, Offset, true);
3032 ExtraLoad = true;
3078 DAG.getIntPtrConstant(NumBytesToPop, true),
3079 DAG.getIntPtrConstant(0, true), InFlag, dl);
3136 DAG.getIntPtrConstant(NumBytesToPop, true),
3138 true),
3202 /// MatchingStackOffset - Return true if the given stack call argument is
3297 return true;
3349 Unused = true;
3464 return true;
3510 return true;
3572 return true;
3582 return true;
3588 return true;
3613 /// \brief Return true if the condition is an unsigned comparison operation.
3617 case X86::COND_E: return true;
3622 case X86::COND_NE: return true;
3623 case X86::COND_B: return true;
3624 case X86::COND_A: return true;
3625 case X86::COND_BE: return true;
3626 case X86::COND_AE: return true;
3734 return true;
3738 /// isFPImmLegal - Returns true if the target can instruction select the
3744 return true;
3758 return true;
3761 /// \brief Returns true if it is beneficial to convert a load of a constant
3770 return true;
3791 /// isUndefOrInRange - Return true if Val is undef or if its value falls within
3803 /// isSequentialOrUndefInRange - Return true if every element in Mask, beginning
3811 return true;
3814 /// isVEXTRACTIndex - Return true if the specified
3833 /// isVINSERTIndex - Return true if the specified INSERT_SUBVECTOR
3925 /// isZero - Returns true if Elt is a constant integer zero
3931 /// isZeroNode - Returns true if Elt is a constant zero or a floating point
3935 return true;
4228 /// target specific opcode. Returns true if the Mask could be calculated. Sets
4229 /// IsUnary to true if only uses one source. Note that this will set IsUnary for
4273 IsUnary = true;
4278 IsUnary = true;
4283 IsUnary = true;
4286 IsUnary = true;
4350 IsUnary = true;
4363 IsUnary = true;
4367 IsUnary = true;
4371 IsUnary = true;
4389 return true;
4468 bool First = true;
4539 bool First = true;
4632 bool CanFold = true;
4845 false/*isVolatile*/, true/*ReadMem*/,
5153 bool AllContants = true;
5156 bool IsSplat = true;
5211 /// \brief Return true if \p N implements a horizontal binop and return the
5236 bool CanFold = true;
5426 AddFound = true;
5428 SubFound = true;
5541 bool CanFold = true;
5603 return ExpandHorizontalBinOp(InVec0, InVec1, DL, DAG, X86Opcode, true,
5651 bool IsAllConstants = true;
5696 getShuffleVectorZeroOrUndef(Item, Idx * 2, true, Subtarget, DAG));
5719 return getShuffleVectorZeroOrUndef(Item, 0, true, Subtarget, DAG);
5729 Item = getShuffleVectorZeroOrUndef(Item, 0, true, Subtarget, DAG);
5740 Item = getShuffleVectorZeroOrUndef(Item, 0, true, Subtarget, DAG);
5751 return getVShift(true, VT,
5822 return getShuffleVectorZeroOrUndef(V2, Idx, true, Subtarget, DAG);
6065 return true;
6074 /// mask corresponds to the size of the input vectors which isn't true in the
6080 return true;
6093 return true;
6130 return true;
6140 /// It returns true if the mask is exactly as wide as the argument list, and
6165 return true;
6324 // are -1 for true and 0 for false. We then use the LLVM semantics of 'true'
6579 Zeroable[i] = true;
6593 Zeroable[i] = true;
6677 return true;
6719 for (bool Left : {true, false})
6833 bool AnyExt = true;
6957 bool IsV1Zeroable = true;
7152 V1UsedInPlace = true;
7526 return true;
8476 bool ViableForN[3] = {true, true, true};
8491 IsAnyViable = true;
8564 return true;
8883 return true;
8953 UseHiV2 = true;
8955 UseLoV2 = true;
8961 UseHiV1 = true;
8963 UseLoV1 = true;
9047 return true;
9063 LaneInputs[Mask[i] / Size][(Mask[i] % Size) / LaneSize] = true;
9095 LaneCrossing[(Mask[i] % Size) / LaneSize] = true;
9292 /// This returns true if the elements from a particular input are already in the
9301 return true;
10248 // true.
10280 return true;
11076 MFI->setAdjustsStack(true);
11077 MFI->setHasCalls(true);
11119 X86II::MO_TLSLD, /*LocalDynamic=*/true);
11126 X86II::MO_TLSLDM, /*LocalDynamic=*/true);
11261 MFI->setAdjustsStack(true);
11571 Load = getShuffleVectorZeroOrUndef(Load, 0, true, Subtarget, DAG);
12168 /*IsSigned=*/ true, /*IsReplace=*/ false);
12452 /// \brief return true if \c Op has a use that doesn't just read flags.
12466 return true;
12488 NeedCF = true;
12507 NeedOF = true;
12543 NeedTruncation = true;
12933 case ISD::SETGT: Swap = true; // Fallthrough
12937 case ISD::SETGE: Swap = true; // Fallthrough
12943 case ISD::SETULE: Swap = true; // Fallthrough
12945 case ISD::SETULT: Swap = true; // Fallthrough
13008 case ISD::SETUGT: SSECC = 6; Unsigned = true; break;
13009 case ISD::SETLT: Swap = true; //fall-through
13011 case ISD::SETULT: SSECC = 1; Unsigned = true; break;
13012 case ISD::SETUGE: SSECC = 5; Unsigned = true; break; //NLT
13013 case ISD::SETGE: Swap = true; SSECC = 2; break; // LE + swap
13014 case ISD::SETULE: Unsigned = true; //fall-through
13133 case ISD::SETNE: Invert = true;
13135 case ISD::SETLT: Swap = true;
13137 case ISD::SETGE: Swap = true;
13139 Invert = true; break;
13140 case ISD::SETULT: Swap = true;
13142 FlipSigns = true; break;
13143 case ISD::SETUGE: Swap = true;
13145 FlipSigns = true; Invert = true; break;
13157 case ISD::SETULE: Opc = X86ISD::UMIN; MinMax = true; break;
13158 case ISD::SETUGE: Opc = X86ISD::UMAX; MinMax = true; break;
13183 Subus = true; Invert = false; Swap = false;
13188 case ISD::SETUGE: Subus = true; Invert = false; Swap = true; break;
13189 case ISD::SETULE: Subus = true; Invert = false; Swap = false; break;
13353 ISD::CondCode NewCC = ISD::getSetCCInverse(CC, true);
13371 // isX86LogicalCmp - Return true if opcode is a X86 logical comparison.
13376 return true;
13389 return true;
13392 return true;
13408 bool addTest = true;
13651 // condition is true.
13964 // isAndOrOfSingleUseSetCCs - Return true if node is an ISD::AND or
13977 // isXor1OfSetCC - Return true if node is an ISD::XOR of a X86ISD::SETCC and
13991 bool addTest = true;
14011 Inverted = true;
14297 Chain = DAG.getCALLSEQ_START(Chain, DAG.getIntPtrConstant(0, true),
14312 Tmp2 = DAG.getCALLSEQ_END(Chain, DAG.getIntPtrConstant(0, true),
14313 DAG.getIntPtrConstant(0, true), SDValue(),
14488 /*ReadMem=*/true,
14489 /*WriteMem=*/true);
14621 ShAmt = getShuffleVectorZeroOrUndef(Op0, 0, true, &Subtarget, DAG);
14838 unsigned X86CC = TranslateX86CC(CC, true, LHS, RHS, DAG);
14942 IsTestPacked = true; // Fallthrough
14952 IsTestPacked = true; // Fallthrough
14962 IsTestPacked = true; // Fallthrough
15416 MFI->setReturnAddressIsTaken(true);
15448 MFI->setFrameAddressIsTaken(true);
15965 case ISD::SDIV: isSigned = true; LC = RTLIB::SDIV_I128; break;
15967 case ISD::SREM: isSigned = true; LC = RTLIB::SREM_I128; break;
15969 case ISD::SDIVREM: isSigned = true; LC = RTLIB::SDIVREM_I128; break;
16470 CanBeSimplified = true;
16672 /// Returns true if the operand type is exactly twice the native width, and
17114 case ISD::ADDE: Opc = X86ISD::ADC; ExtraOp = true; break;
17116 case ISD::SUBE: Opc = X86ISD::SBB; ExtraOp = true; break;
17324 FP_TO_INTHelper(SDValue(N, 0), DAG, IsSigned, /*IsReplace=*/ true);
17675 // isLegalAddressingMode - Return true if the addressing mode represented
17726 return true;
17744 return true;
17766 return true;
17799 return true;
17814 return true;
17820 bool X86TargetLowering::isVectorLoadExtDesirable(SDValue) const { return true; }
17835 return true;
18399 return true;
18411 // true/false values to select between, and a branch opcode to use.
18531 // Add the true and fallthrough blocks as its successors.
18544 // The true block target of the first (or only) branch is always sinkMBB.
18573 // value as the first Jcc (the True operand of the SELECT_CC/CMOV nodes).
18928 FramePtr, true, X86FI->getRestoreBasePointerOffset())
19387 // SETCC_CARRY sets the dest to ~0 for true or 0 for false.
19395 /// isGAPlusOffset - Returns true (and the GlobalValue and the offset) if the
19404 return true;
19423 return true;
19439 return true;
19491 false/*isVolatile*/, true/*ReadMem*/,
19565 /*AddTo*/ true);
19566 return true;
19608 /*AddTo*/ true);
19609 return true;
19623 /*AddTo*/ true);
19624 return true;
19637 /*AddTo*/ true);
19638 return true;
19671 /*AddTo*/ true);
19672 return true;
19707 /*AddTo*/ true);
19708 return true;
19823 HasPSHUFB = true;
19830 return true;
19840 return true;
20078 DCI.CombineTo(N.getNode(), N.getOperand(0), /*AddTo*/ true);
20096 DCI.CombineTo(Old.getNode(), V, /*AddTo*/ true);
20098 return true;
20122 return DCI.CombineTo(N.getNode(), N.getOperand(0), /*AddTo*/ true);
20314 CanFold = true;
20340 SDValue LD = EltsFromConsecutiveLoads(VT, Elts, dl, DAG, true);
20658 NeedSplit = true;
20946 // so that TrueC (the true value) is larger than FalseC.
20954 NeedsCondInvert = true;
21003 isFastMultiplier = true;
21079 CC = ISD::getSetCCInverse(CC, true);
21162 // Try invert the condition if true value is not all 1s and false value
21352 checkAgainstTrue = true;
21374 truncatedToBoolWithAnd = true;
21383 // i.e. it's a comparison against true but the result of SETCC_CARRY is not
21397 // Check whether false/true value has canonical one, i.e. 0 or 1.
21400 // Quit if true value is not a constant.
21417 bool FValIsFalse = true;
21462 isAnd = true;
21480 return true;
21525 // Canonicalize the TrueC/FalseC values so that TrueC (the true value) is
21585 isFastMultiplier = true;
21975 ExpectingFlags = true;
22048 return true;
22065 return true;
22208 bool IsZext = true;
22559 return DCI.CombineTo(N, NewVec, TF, true);
22643 return DCI.CombineTo(N, NewVec, WideLd.getValue(1), true);
22950 /// Return 'true' if this vector operation is "horizontal"
22962 /// set to A, RHS to B, and the routine returns 'true'.
23073 return true;
23086 isHorizontalBinOp(LHS, RHS, true))
23754 isHorizontalBinOp(Op0, Op1, true))
23787 isHorizontalBinOp(Op0, Op1, true))
23937 /// isTypeDesirableForOp - Return true if the target has native support for
23945 return true;
23949 return true;
23967 /// beneficial for dag combiner to promote the specified node. If true, it
23992 Promote = true;
23998 Promote = true;
24006 Promote = true;
24014 Commute = true;
24026 Promote = true;
24065 return true;
24067 return true;
