Lines Matching refs:UNDEF
562 setOperationAction(ISD::UNDEF, MVT::f64, Expand);
591 setOperationAction(ISD::UNDEF, MVT::f64, Expand);
592 setOperationAction(ISD::UNDEF, MVT::f32, Expand);
621 setOperationAction(ISD::UNDEF, MVT::f80, Expand);
3791 /// isUndefOrInRange - Return true if Val is undef or if its value falls within
3797 /// isUndefOrEqual - Val is either less than zero (undef) or equal to the
3805 /// sequential range (Low, Low+Size]. or is undef.
4001 // Extract from UNDEF is UNDEF.
4002 if (Vec.getOpcode() == ISD::UNDEF)
4048 // Inserting UNDEF is Result
4049 if (Vec.getOpcode() == ISD::UNDEF)
4079 // We are still creating an INSERT_SUBVECTOR below with an undef node to
4081 // we are not recursing on that node by checking for undef here.
4083 Result.getOpcode() != ISD::UNDEF) {
4086 SDValue Undef = DAG.getUNDEF(ResultVT);
4087 SDValue Vec256 = DAG.getNode(ISD::INSERT_SUBVECTOR, dl, ResultVT, Undef,
4209 /// vector of zero or undef vector. This produces a shuffle where the low
4210 /// element of V2 is swizzled into the zero/undef vector, landing at element
4304 if (Op->getOpcode() == ISD::UNDEF) {
4567 Zeroable[i] = (Elt.getOpcode() == ISD::UNDEF || X86::isZeroNode(Elt));
4755 /// Example: <load i32 *a, load i32 *a+4, undef, undef> -> zextload a
4758 /// rather than undef via VZEXT_LOAD, but we do not detect that case today.
4768 // For each element in the initializer, see if we've found a load or an undef.
4777 (Elt.getOpcode() != ISD::UNDEF && !ISD::isNON_EXTLoad(Elt.getNode())))
4780 if (Elt.getNode()->getOpcode() == ISD::UNDEF)
4786 if (Elt.getOpcode() == ISD::UNDEF)
5042 // undef)
5079 if (Opc == ISD::UNDEF)
5161 if (In.getOpcode() == ISD::UNDEF)
5247 if (Op->getOpcode() == ISD::UNDEF) {
5277 if (V0.getOpcode() == ISD::UNDEF)
5280 if (V1.getOpcode() == ISD::UNDEF)
5330 /// If \p isUndefLO is set, then the algorithm propagates UNDEF to the lower
5331 /// 128-bits of the result. If \p isUndefHI is set, then UNDEF is propagated to
5352 // Don't emit a horizontal binop if the result is expected to be UNDEF.
5353 if (!isUndefLO && V0->getOpcode() != ISD::UNDEF)
5355 if (!isUndefHI && V1->getOpcode() != ISD::UNDEF)
5358 // Don't emit a horizontal binop if the result is expected to be UNDEF.
5359 if (!isUndefLO && (V0_LO->getOpcode() != ISD::UNDEF ||
5360 V1_LO->getOpcode() != ISD::UNDEF))
5363 if (!isUndefHI && (V0_HI->getOpcode() != ISD::UNDEF ||
5364 V1_HI->getOpcode() != ISD::UNDEF))
5396 // Skip 'undef' values.
5398 if (Opcode == ISD::UNDEF) {
5431 if (InVec0.getOpcode() == ISD::UNDEF)
5433 if (InVec1.getOpcode() == ISD::UNDEF)
5456 // Don't try to fold this build_vector into an ADDSUB if the inputs are undef.
5457 if (AddFound && SubFound && InVec0.getOpcode() != ISD::UNDEF &&
5458 InVec1.getOpcode() != ISD::UNDEF)
5485 // Count the number of UNDEF operands in the build_vector in input.
5487 if (BV->getOperand(i)->getOpcode() == ISD::UNDEF)
5491 if (BV->getOperand(i)->getOpcode() == ISD::UNDEF)
5495 // operands but one are UNDEF.
5524 ((InVec0.getOpcode() == ISD::UNDEF ||
5525 InVec2.getOpcode() == ISD::UNDEF) || InVec0 == InVec2) &&
5526 ((InVec1.getOpcode() == ISD::UNDEF ||
5527 InVec3.getOpcode() == ISD::UNDEF) || InVec1 == InVec3))
5532 ((InVec0.getOpcode() == ISD::UNDEF ||
5533 InVec2.getOpcode() == ISD::UNDEF) || InVec0 == InVec2) &&
5534 ((InVec1.getOpcode() == ISD::UNDEF ||
5535 InVec3.getOpcode() == ISD::UNDEF) || InVec1 == InVec3))
5545 ((InVec0.getOpcode() == ISD::UNDEF ||
5546 InVec2.getOpcode() == ISD::UNDEF) || InVec0 == InVec2) &&
5547 ((InVec1.getOpcode() == ISD::UNDEF ||
5548 InVec3.getOpcode() == ISD::UNDEF) || InVec1 == InVec3))
5552 ((InVec0.getOpcode() == ISD::UNDEF ||
5553 InVec2.getOpcode() == ISD::UNDEF) || InVec0 == InVec2) &&
5554 ((InVec1.getOpcode() == ISD::UNDEF ||
5555 InVec3.getOpcode() == ISD::UNDEF) || InVec1 == InVec3))
5655 if (Elt.getOpcode() == ISD::UNDEF)
5669 // All undef vector. Return an UNDEF. All zero vectors were handled above.
5673 // Special case for single non-zero, non-undef, element.
5775 // shuffle (scalar_to_vector (load (ptr + 4))), undef, <0, 0, 0, 0>
5777 // shuffle (vload ptr)), undef, <1, 1, 1, 1>
5818 // One half is zero or undef.
5899 if (Op.getOperand(0).getOpcode() != ISD::UNDEF)
5905 if (Op.getOperand(i).getOpcode() == ISD::UNDEF) continue;
5913 // our (non-undef) elements to the full vector width with the element in the
5916 if (Op.getOperand(i).getOpcode() != ISD::UNDEF)
5929 // If V[i+EltStride] is undef and this is the first round of mixing,
5932 // inserted as undef can be dropped. This isn't safe for successive
5934 if (V[i+EltStride].getOpcode() == ISD::UNDEF &&
6006 SDValue Undef = DAG.getUNDEF(ResVT);
6010 V2 = DAG.getNode(ISD::INSERT_SUBVECTOR, dl, ResVT, Undef, V2, ZeroIdx);
6015 V1 = DAG.getNode(ISD::INSERT_SUBVECTOR, dl, ResVT, Undef, V1, ZeroIdx);
6059 /// ShuffleVectorSDNode mask) requires any shuffles to occur. Both undef and an
6105 /// non-trivial to compute in the face of undef lanes. The representation is
6123 // This is the first non-undef entry in this slot of a 128-bit lane.
6141 /// each element of the mask is either -1 (signifying undef) or the value given
6175 /// NB: We rely heavily on "undef" masks preserving the input lane.
6558 /// Either it is an undef element in the shuffle mask, the element of the input
6559 /// referenced is undef, or the element of the input referenced is known to be
6590 // The UNDEF opcode check really should be dead code here, but not quite
6592 if (Input.getOpcode() == ISD::UNDEF || X86::isZeroNode(Input))
6813 /// inputs to explicitly zero-extend and undef-lanes (sometimes undef due to
7433 assert(Mask[0] != -1 && "No undef lanes in multi-input v2 shuffles!");
7434 assert(Mask[1] != -1 && "No undef lanes in multi-input v2 shuffles!");
7553 // Handles all the cases where we have a single V2 element and an undef.
8453 /// Any of these lanes can of course be undef.
8475 // partially undef inputs.
8479 // Ignore undef lanes, we'll optimistically collapse them to the pattern we
8843 // If both elements are undef, its trivial.
8849 // Check for an undef mask and a mask value properly aligned to fit with
8850 // a pair of values. If we find such a case, use the non-undef mask's value.
9182 // If either input is a zero vector, replace it with an undef input.
10128 bool V1IsUndef = V1.getOpcode() == ISD::UNDEF;
10129 bool V2IsUndef = V2.getOpcode() == ISD::UNDEF;
10133 // When we create a shuffle node we put the UNDEF node to second operand,
10134 // but in some cases the first operand may be transformed to UNDEF.
10139 // Check for non-undef masks pointing at an undef vector and make the masks
10140 // undef as well. This makes it easier to match the shuffle based solely on
10247 // undef SDNodes. i.e: ISD::isBuildVectorOfConstantSDNodes(BuildVector) is
10588 if (Vec.getOpcode() == ISD::UNDEF)
10794 // (insert_subvector (insert_subvector undef, (load addr), 0),
10820 if (IdxVal == 0 && Vec.getOpcode() == ISD::UNDEF) // the operation is legal
10823 SDValue Undef = DAG.getUNDEF(OpVT);
10832 SDValue Vec2 = DAG.getNode(ISD::INSERT_SUBVECTOR, dl, OpVT, Undef,
10838 SDValue Vec2 = DAG.getNode(ISD::INSERT_SUBVECTOR, dl, OpVT, Undef,
11947 SDValue Undef = DAG.getUNDEF(InVT);
11949 SDValue OpLo = getUnpackl(DAG, dl, InVT, In, NeedZero ? ZeroVec : Undef);
11950 SDValue OpHi = getUnpackh(DAG, dl, InVT, In, NeedZero ? ZeroVec : Undef);
12130 SDValue Undef = DAG.getUNDEF(MVT::v16i8);
12131 OpLo = DAG.getVectorShuffle(MVT::v16i8, DL, OpLo, Undef, ShufMask1);
12132 OpHi = DAG.getVectorShuffle(MVT::v16i8, DL, OpHi, Undef, ShufMask1);
13738 SDValue Undef = DAG.getUNDEF(InVT);
13744 SDValue OpLo = DAG.getVectorShuffle(InVT, dl, In, Undef, &ShufMask1[0]);
13750 SDValue OpHi = DAG.getVectorShuffle(InVT, dl, In, Undef, &ShufMask2[0]);
13766 // TODO: It is possible to support ZExt by zeroing the undef values during
14552 if (CurrentOp->getOpcode() == ISD::UNDEF) {
14564 if (CurrentOp->getOpcode() == ISD::UNDEF) {
14576 if (CurrentOp->getOpcode() == ISD::UNDEF) {
14679 if (PreservedSrc.getOpcode() == ISD::UNDEF)
14703 if (PreservedSrc.getOpcode() == ISD::UNDEF)
14807 // (v8i1 (insert_subvector undef,
15087 if (Src.getOpcode() == ISD::UNDEF)
16029 // <a|b|c|d> => <b|undef|d|undef>
16031 // <e|f|g|h> => <f|undef|h|undef>
16044 // PMULUDQ <4 x i32> <b|undef|d|undef>, <4 x i32> <f|undef|h|undef>
16227 if (BaseShAmt && BaseShAmt.getOpcode() == ISD::UNDEF)
16398 if (Op->getOpcode() == ISD::UNDEF) {
16900 // Explicitly mark the extra elements as Undef.
17286 SDValue UNDEF = DAG.getUNDEF(VT);
17288 N->getOperand(0), UNDEF);
17290 N->getOperand(1), UNDEF);
19458 // V UNDEF BUILD_VECTOR UNDEF
19466 V2.getOperand(1).getOpcode() != ISD::UNDEF ||
19467 V1.getOperand(1).getOpcode() != ISD::UNDEF)
19801 // This is a zero or undef lane, we're done.
19809 // The incoming lanes are zero or undef, it doesn't matter which ones we
20286 Undef, <Mask>) ->
20287 // (shuffle (BINOP (bitcast A), (bitcast B)), Undef, <Mask>)
20295 N1.getOpcode() == ISD::UNDEF && N0.hasOneUse() &&
20750 // Be sure we emit undef where we can.
20751 if (Cond.getOperand(i)->getOpcode() == ISD::UNDEF)
21119 // don't rely on particular values of undef lanes.
22062 V1.getOperand(0).getOpcode() == ISD::UNDEF &&
22182 if (Shuffle->getOperand(1)->getOpcode() != ISD::UNDEF)
22212 // Expected undef
22230 // (instead of undef) where the k elements come from the zero vector.
22595 if (Mld->getSrc0().getOpcode() != ISD::UNDEF) {
22964 /// operands is UNDEF then the result is UNDEF.
22997 // LHS = VECTOR_SHUFFLE LHS, undef, <0, 1, ..., N-1>
22998 // NOTE: in what follows a default initialized SDValue represents an UNDEF of
23003 if (LHS.getOperand(0).getOpcode() != ISD::UNDEF)
23005 if (LHS.getOperand(1).getOpcode() != ISD::UNDEF)
23010 if (LHS.getOpcode() != ISD::UNDEF)
23021 if (RHS.getOperand(0).getOpcode() != ISD::UNDEF)
23023 if (RHS.getOperand(1).getOpcode() != ISD::UNDEF)
23028 if (RHS.getOpcode() != ISD::UNDEF)
23038 // If everything is UNDEF then bail out: it would be better to fold to UNDEF.
23055 // Ignore any UNDEF components.
23071 LHS = A.getNode() ? A : B; // If A is 'UNDEF', use B for it.
23072 RHS = B.getNode() ? B : A; // If B is 'UNDEF', use A for it.
