Lines Matching full:desired
4 ;bool cas(float volatile *p, float *expected, float desired) {
6 ; __asm__ __volatile__("lock; cmpxchg %[desired], %[mem]; "
12 ; [desired] "q" (desired),
18 define zeroext i1 @cas(float* %p, float* %expected, float %desired) nounwind {
22 %desired.addr = alloca float, align 4
26 store float %desired, float* %desired.addr, align 4
30 %3 = load float, float* %desired.addr, align 4
45 define zeroext i1 @cas2(i8* %p, i8* %expected, i1 zeroext %desired) nounwind {
49 %desired.addr = alloca i8, align 1
53 %frombool = zext i1 %desired to i8
54 store i8 %frombool, i8* %desired.addr, align 1
59 %3 = load i8, i8* %desired.addr, align 1
