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109 /// Writes and ReadDefs are empty. ProcIndices contains 0 for any processor.
113 /// subtargets. ProcIndices contains 0 for any processor.
116 /// SchedWrites and SchedReads per-processor. InstrClassMap should map the same
125 /// itinerary class. Each inherits the processor index from the ItinRW record
134 // Sorted list of ProcIdx, where ProcIdx==0 implies any processor.
160 // Processor model.
164 // ModelDef is NULL for inferred Models. This happens when a processor defines
165 // an itinerary but no machine model. If the processor defines neither a machine
173 // ItinDefList orders this processor's InstrItinData records by SchedClass idx.
183 // This list is empty if the Processor has no value for Itineraries.
188 // This list is empty if no ItinRW refers to this Processor.
191 // All read/write resources associated with this processor.
195 // Per-operand machine model resources associated with this processor.
226 // List of unique processor models.
229 // Map Processor's MachineModel or ProcItin to a CodeGenProcModel index.
300 // Iterate over the unique processor models.
381 // Initialize a new processor model if it is unique.