Lines Matching refs:dw1
128 insn->bits1.da16.dest_writemask = dest.dw1.bits.writemask;
139 insn->bits1.ia1.dest_indirect_offset = dest.dw1.bits.indirect_offset;
145 insn->bits1.ia16.dest_indirect_offset = dest.dw1.bits.indirect_offset;
253 insn->bits3.ud = reg.dw1.ud;
276 insn->bits2.ia1.src0_indirect_offset = reg.dw1.bits.indirect_offset;
279 insn->bits2.ia16.src0_subreg_nr = reg.dw1.bits.indirect_offset;
297 insn->bits2.da16.src0_swz_x = BRW_GET_SWZ(reg.dw1.bits.swizzle, BRW_CHANNEL_X);
298 insn->bits2.da16.src0_swz_y = BRW_GET_SWZ(reg.dw1.bits.swizzle, BRW_CHANNEL_Y);
299 insn->bits2.da16.src0_swz_z = BRW_GET_SWZ(reg.dw1.bits.swizzle, BRW_CHANNEL_Z);
300 insn->bits2.da16.src0_swz_w = BRW_GET_SWZ(reg.dw1.bits.swizzle, BRW_CHANNEL_W);
336 insn->bits3.ud = reg.dw1.ud;
368 insn->bits3.da16.src1_swz_x = BRW_GET_SWZ(reg.dw1.bits.swizzle, BRW_CHANNEL_X);
369 insn->bits3.da16.src1_swz_y = BRW_GET_SWZ(reg.dw1.bits.swizzle, BRW_CHANNEL_Y);
370 insn->bits3.da16.src1_swz_z = BRW_GET_SWZ(reg.dw1.bits.swizzle, BRW_CHANNEL_Z);
371 insn->bits3.da16.src1_swz_w = BRW_GET_SWZ(reg.dw1.bits.swizzle, BRW_CHANNEL_W);
757 assert(brw_is_single_value_swizzle(reg.dw1.bits.swizzle));
758 return reg.subnr / 4 + BRW_GET_SWZ(reg.dw1.bits.swizzle, 0);
785 insn->bits1.da3src.dest_writemask = dest.dw1.bits.writemask;
792 insn->bits2.da3src.src0_swizzle = src0.dw1.bits.swizzle;
803 insn->bits2.da3src.src1_swizzle = src1.dw1.bits.swizzle;
815 insn->bits3.da3src.src2_swizzle = src2.dw1.bits.swizzle;
