Lines Matching refs:Instr
241 Instr* pc = reinterpret_cast<Instr*>(pc_);
242 Instr* instr = reinterpret_cast<Instr*>(instructions);
244 *(pc + i) = *(instr + i);
404 const Instr kPushRegPattern =
408 const Instr kPopRegPattern =
411 const Instr kLdrPCImmedMask = 15 * B24 | 7 * B20 | 15 * B16;
412 const Instr kLdrPCImmedPattern = 5 * B24 | L | kRegister_pc_Code * B16;
414 const Instr kLdrPpImmedMask = 15 * B24 | 7 * B20 | 15 * B16;
415 const Instr kLdrPpImmedPattern = 5 * B24 | L | kRegister_r8_Code * B16;
417 const Instr kLdrPpRegMask = 15 * B24 | 7 * B20 | 15 * B16;
418 const Instr kLdrPpRegPattern = 7 * B24 | L | kRegister_r8_Code * B16;
420 const Instr kVldrDPCMask = 15 * B24 | 3 * B20 | 15 * B16 | 15 * B8;
421 const Instr kVldrDPCPattern = 13 * B24 | L | kRegister_pc_Code * B16 | 11 * B8;
423 const Instr kVldrDPpMask = 15 * B24 | 3 * B20 | 15 * B16 | 15 * B8;
424 const Instr kVldrDPpPattern = 13 * B24 | L | kRegister_r8_Code * B16 | 11 * B8;
426 const Instr kBlxRegMask =
428 const Instr kBlxRegPattern =
430 const Instr kBlxIp = al | kBlxRegPattern | ip.code();
431 const Instr kMovMvnMask = 0x6d * B21 | 0xf * B16;
432 const Instr kMovMvnPattern = 0xd * B21;
433 const Instr kMovMvnFlip = B22;
434 const Instr kMovLeaveCCMask = 0xdff * B16;
435 const Instr kMovLeaveCCPattern = 0x1a0 * B16;
436 const Instr kMovwPattern = 0x30 * B20;
437 const Instr kMovtPattern = 0x34 * B20;
438 const Instr kMovwLeaveCCFlip = 0x5 * B21;
439 const Instr kMovImmedMask = 0x7f * B21;
440 const Instr kMovImmedPattern = 0x1d * B21;
441 const Instr kOrrImmedMask = 0x7f * B21;
442 const Instr kOrrImmedPattern = 0x1c * B21;
443 const Instr kCmpCmnMask = 0xdd * B20 | 0xf * B12;
444 const Instr kCmpCmnPattern = 0x15 * B20;
445 const Instr kCmpCmnFlip = B21;
446 const Instr kAddSubFlip = 0x6 * B21;
447 const Instr kAndBicFlip = 0xe * B21;
450 const Instr kLdrRegFpOffsetPattern =
452 const Instr kStrRegFpOffsetPattern =
454 const Instr kLdrRegFpNegOffsetPattern =
456 const Instr kStrRegFpNegOffsetPattern =
458 const Instr kLdrStrInstrTypeMask = 0xffff0000;
515 Condition Assembler::GetCondition(Instr instr) {
516 return Instruction::ConditionField(instr);
520 bool Assembler::IsBranch(Instr instr) {
521 return (instr & (B27 | B25)) == (B27 | B25);
525 int Assembler::GetBranchOffset(Instr instr) {
526 DCHECK(IsBranch(instr));
529 return ((instr & kImm24Mask) << 8) >> 6;
533 bool Assembler::IsLdrRegisterImmediate(Instr instr) {
534 return (instr & (B27 | B26 | B25 | B22 | B20)) == (B26 | B20);
538 bool Assembler::IsVldrDRegisterImmediate(Instr instr) {
539 return (instr & (15 * B24 | 3 * B20 | 15 * B8)) == (13 * B24 | B20 | 11 * B8);
543 int Assembler::GetLdrRegisterImmediateOffset(Instr instr) {
544 instr));
545 bool positive = (instr & B23) == B23;
546 int offset = instr & kOff12Mask; // Zero extended offset.
551 int Assembler::GetVldrDRegisterImmediateOffset(Instr instr) {
552 DCHECK(IsVldrDRegisterImmediate(instr));
553 bool positive = (instr & B23) == B23;
554 int offset = instr & kOff8Mask; // Zero extended offset.
560 Instr Assembler::SetLdrRegisterImmediateOffset(Instr instr, int offset) {
561 DCHECK(IsLdrRegisterImmediate(instr));
566 instr = (instr & ~B23) | (positive ? B23 : 0);
568 return (instr & ~kOff12Mask) | offset;
572 Instr Assembler::SetVldrDRegisterImmediateOffset(Instr instr, int offset) {
573 DCHECK(IsVldrDRegisterImmediate(instr));
579 instr = (instr & ~B23) | (positive ? B23 : 0);
581 return (instr & ~kOff8Mask) | (offset >> 2);
585 bool Assembler::IsStrRegisterImmediate(Instr instr) {
586 return (instr & (B27 | B26 | B25 | B22 | B20)) == B26;
590 Instr Assembler::SetStrRegisterImmediateOffset(Instr instr, int offset) {
591 DCHECK(IsStrRegisterImmediate(instr));
596 instr = (instr & ~B23) | (positive ? B23 : 0);
598 return (instr & ~kOff12Mask) | offset;
602 bool Assembler::IsAddRegisterImmediate(Instr instr) {
603 return (instr & (B27 | B26 | B25 | B24 | B23 | B22 | B21)) == (B25 | B23);
607 Instr Assembler::SetAddRegisterImmediateOffset(Instr instr, int offset) {
608 DCHECK(IsAddRegisterImmediate(instr));
612 return (instr & ~kOff12Mask) | offset;
616 Register Assembler::GetRd(Instr instr) {
618 reg.code_ = Instruction::RdValue(instr);
623 Register Assembler::GetRn(Instr instr) {
625 reg.code_ = Instruction::RnValue(instr);
630 Register Assembler::GetRm(Instr instr) {
632 reg.code_ = Instruction::RmValue(instr);
637 Instr Assembler::GetConsantPoolLoadPattern() {
646 Instr Assembler::GetConsantPoolLoadMask() {
655 bool Assembler::IsPush(Instr instr) {
656 return ((instr & ~kRdMask) == kPushRegPattern);
660 bool Assembler::IsPop(Instr instr) {
661 return ((instr & ~kRdMask) == kPopRegPattern);
665 bool Assembler::IsStrRegFpOffset(Instr instr) {
666 return ((instr & kLdrStrInstrTypeMask) == kStrRegFpOffsetPattern);
670 bool Assembler::IsLdrRegFpOffset(Instr instr) {
671 return ((instr & kLdrStrInstrTypeMask) == kLdrRegFpOffsetPattern);
675 bool Assembler::IsStrRegFpNegOffset(Instr instr) {
676 return ((instr & kLdrStrInstrTypeMask) == kStrRegFpNegOffsetPattern);
680 bool Assembler::IsLdrRegFpNegOffset(Instr instr) {
681 return ((instr & kLdrStrInstrTypeMask) == kLdrRegFpNegOffsetPattern);
685 bool Assembler::IsLdrPcImmediateOffset(Instr instr) {
688 return (instr & kLdrPCImmedMask) == kLdrPCImmedPattern;
692 bool Assembler::IsLdrPpImmediateOffset(Instr instr) {
695 return (instr & kLdrPpImmedMask) == kLdrPpImmedPattern;
699 bool Assembler::IsLdrPpRegOffset(Instr instr) {
702 return (instr & kLdrPpRegMask) == kLdrPpRegPattern;
706 Instr Assembler::GetLdrPpRegOffsetPattern() { return kLdrPpRegPattern; }
709 bool Assembler::IsVldrDPcImmediateOffset(Instr instr) {
712 return (instr & kVldrDPCMask) == kVldrDPCPattern;
716 bool Assembler::IsVldrDPpImmediateOffset(Instr instr) {
719 return (instr & kVldrDPpMask) == kVldrDPpPattern;
723 bool Assembler::IsBlxReg(Instr instr) {
726 return (instr & kBlxRegMask) == kBlxRegPattern;
730 bool Assembler::IsBlxIp(Instr instr) {
733 return instr == kBlxIp;
737 bool Assembler::IsTstImmediate(Instr instr) {
738 return (instr & (B27 | B26 | I | kOpCodeMask | S | kRdMask)) ==
743 bool Assembler::IsCmpRegister(Instr instr) {
744 return (instr & (B27 | B26 | I | kOpCodeMask | S | kRdMask | B4)) ==
749 bool Assembler::IsCmpImmediate(Instr instr) {
750 return (instr & (B27 | B26 | I | kOpCodeMask | S | kRdMask)) ==
755 Register Assembler::GetCmpImmediateRegister(Instr instr) {
756 DCHECK(IsCmpImmediate(instr));
757 return GetRn(instr);
761 int Assembler::GetCmpImmediateRawImmediate(Instr instr) {
762 DCHECK(IsCmpImmediate(instr));
763 return instr & kOff12Mask;
786 Instr instr = instr_at(pos);
787 if (is_uint24(instr)) {
789 return instr;
791 DCHECK((instr & 7*B25) == 5*B25); // b, bl, or blx imm24
792 int imm26 = ((instr & kImm24Mask) << 8) >> 6;
793 if ((Instruction::ConditionField(instr) == kSpecialCondition) &&
794 ((instr & B24) != 0)) {
803 Instr instr = instr_at(pos);
804 if (is_uint24(instr)) {
873 DCHECK((instr & 7*B25) == 5*B25); // b, bl, or blx imm24
874 if (Instruction::ConditionField(instr) == kSpecialCondition) {
877 instr = (instr & ~(B24 | kImm24Mask)) | ((imm26 & 2) >> 1)*B24;
880 instr &= ~kImm24Mask;
884 instr_at_put(pos, instr | (imm24 & kImm24Mask));
898 Instr instr = instr_at(l.pos());
899 if ((instr & ~kImm24Mask) == 0) {
902 DCHECK((instr & 7*B25) == 5*B25); // b, bl, or blx
903 Condition cond = Instruction::ConditionField(instr);
910 if ((instr & B24) != 0)
989 Instr* instr) {
1001 if (instr != NULL) {
1002 if ((*instr & kMovMvnMask) == kMovMvnPattern) {
1004 *instr ^= kMovMvnFlip;
1006 } else if ((*instr & kMovLeaveCCMask) == kMovLeaveCCPattern) {
1009 *instr ^= kMovwLeaveCCFlip;
1010 *instr |= Assembler::EncodeMovwImmediate(imm32);
1016 } else if ((*instr & kCmpCmnMask) == kCmpCmnPattern) {
1018 *instr ^= kCmpCmnFlip;
1022 Instr alu_insn = (*instr & kALUMask);
1026 *instr ^= kAddSubFlip;
1032 *instr ^= kAndBicFlip;
1076 Instr instr) const {
1080 !fits_shifter(imm32_, &dummy1, &dummy2, &instr)) {
1096 if ((instr & ~kCondMask) != 13 * B21) { // mov, S not set
1165 void Assembler::addrmod1(Instr instr,
1170 DCHECK((instr & ~(kCondMask | kOpCodeMask | S)) == 0);
1176 !fits_shifter(x.imm32_, &rotate_imm, &immed_8, &instr)) {
1182 Condition cond = Instruction::ConditionField(instr);
1183 if ((instr & ~kCondMask) == 13*B21) { // mov, S not set
1187 addrmod1(instr, rn, rd, Operand(ip));
1191 instr |= I | rotate_imm*B8 | immed_8;
1194 instr |= x.shift_imm_*B7 | x.shift_op_ | x.rm_.code();
1198 instr |= x.rs_.code()*B8 | x.shift_op_ | B4 | x.rm_.code();
1200 emit(instr | rn.code()*B16 | rd.code()*B12);
1208 void Assembler::addrmod2(Instr instr, Register rd, const MemOperand& x) {
1209 DCHECK((instr & ~(kCondMask | B | L)) == B26);
1221 DCHECK(!x.rn_.is(ip) && ((instr & L) == L || !rd.is(ip)));
1222 mov(ip, Operand(x.offset_), LeaveCC, Instruction::ConditionField(instr));
1223 addrmod2(instr, rd, MemOperand(x.rn_, ip, x.am_));
1227 instr |= offset_12;
1233 instr |= B25 | x.shift_imm_*B7 | x.shift_op_ | x.rm_.code();
1236 emit(instr | am | x.rn_.code()*B16 | rd.code()*B12);
1240 void Assembler::addrmod3(Instr instr, Register rd, const MemOperand& x) {
1241 DCHECK((instr & ~(kCondMask | L | S6 | H)) == (B4 | B7));
1254 DCHECK(!x.rn_.is(ip) && ((instr & L) == L || !rd.is(ip)));
1255 mov(ip, Operand(x.offset_), LeaveCC, Instruction::ConditionField(instr));
1256 addrmod3(instr, rd, MemOperand(x.rn_, ip, x.am_));
1260 instr |= B | (offset_8 >> 4)*B8 | (offset_8 & 0xf);
1264 DCHECK(!x.rn_.is(ip) && ((instr & L) == L || !rd.is(ip)));
1266 Instruction::ConditionField(instr));
1267 addrmod3(instr, rd, MemOperand(x.rn_, ip, x.am_));
1272 instr |= x.rm_.code();
1275 emit(instr | am | x.rn_.code()*B16 | rd.code()*B12);
1279 void Assembler::addrmod4(Instr instr, Register rn, RegList rl) {
1280 DCHECK((instr & ~(kCondMask | P | U | W | L)) == B27);
1283 emit(instr | rn.code()*B16 | rl);
1287 void Assembler::addrmod5(Instr instr, CRegister crd, const MemOperand& x) {
1290 (instr & ~(kCondMask | kCoprocessorMask | P | U | N | W | L)));
1308 emit(instr | am | x.rn_.code()*B16 | crd.code()*B12 | offset_8);
1860 Instr instr;
1872 instr = I | rotate_imm*B8 | immed_8;
1875 instr = src.rm_.code();
1877 emit(cond | instr | B24 | B21 | fields | 15*B12);
2011 emit(reinterpret_cast<Instr>(msg));
2749 static Instr EncodeVCVT(const VFPType dst_type,
3134 bool Assembler::IsMovT(Instr instr) {
3135 instr &= ~(((kNumberOfConditions - 1) << 28) | // Mask off conditions
3138 return instr == kMovtPattern;
3142 bool Assembler::IsMovW(Instr instr) {
3143 instr &= ~(((kNumberOfConditions - 1) << 28) | // Mask off conditions
3146 return instr == kMovwPattern;
3150 Instr Assembler::GetMovTPattern() { return kMovtPattern; }
3153 Instr Assembler::GetMovWPattern() { return kMovwPattern; }
3156 Instr Assembler::EncodeMovwImmediate(uint32_t immediate) {
3162 Instr Assembler::PatchMovwImmediate(Instr instruction, uint32_t immediate) {
3168 int Assembler::DecodeShiftImm(Instr instr) {
3169 int rotate = Instruction::RotateValue(instr) * 2;
3170 int immed8 = Instruction::Immed8Value(instr);
3175 Instr Assembler::PatchShiftImm(Instr instr, int immed) {
3181 return (instr & ~kOff12Mask) | (rotate_imm << 8) | immed_8;
3185 bool Assembler::IsNop(Instr instr, int type) {
3188 return instr == (al | 13*B21 | type*B12 | type);
3192 bool Assembler::IsMovImmed(Instr instr) {
3193 return (instr & kMovImmedMask) == kMovImmedPattern;
3197 bool Assembler::IsOrrImmed(Instr instr) {
3198 return (instr & kOrrImmedMask) == kOrrImmedPattern;
3518 Instr instr = instr_at(rinfo.pc());
3520 DCHECK((IsVldrDPcImmediateOffset(instr) &&
3521 GetVldrDRegisterImmediateOffset(instr) == 0));
3533 Instr instr2 = instr_at(rinfo2.pc());
3541 instr_at_put(rinfo.pc(), SetVldrDRegisterImmediateOffset(instr, delta));
3559 Instr instr = instr_at(rinfo.pc());
3562 DCHECK(!IsVldrDPcImmediateOffset(instr));
3564 if (IsLdrPcImmediateOffset(instr) &&
3565 GetLdrRegisterImmediateOffset(instr) == 0) {
3580 Instr instr2 = instr_at(rinfo2.pc());
3591 instr_at_put(rinfo.pc(), SetLdrRegisterImmediateOffset(instr, delta));
3597 DCHECK(IsMovW(instr));
3781 Instr instr = assm->instr_at(rinfo.pc());
3785 Instr next_instr = assm->instr_at(rinfo.pc() + Assembler::kInstrSize);
3786 DCHECK((Assembler::IsMovW(instr) &&
3787 Instruction::ImmedMovwMovtValue(instr) == 0));
3791 rinfo.pc(), Assembler::PatchMovwImmediate(instr, offset & 0xffff));
3797 Instr instr_2 = assm->instr_at(rinfo.pc() + Assembler::kInstrSize);
3798 Instr instr_3 = assm->instr_at(rinfo.pc() + 2 * Assembler::kInstrSize);
3799 Instr instr_4 = assm->instr_at(rinfo.pc() + 3 * Assembler::kInstrSize);
3800 DCHECK((Assembler::IsMovImmed(instr) &&
3801 Instruction::Immed8Value(instr) == 0));
3812 rinfo.pc(), Assembler::PatchShiftImm(instr, (offset & kImm8Mask)));
3825 DCHECK((Assembler::IsVldrDPpImmediateOffset(instr) &&
3826 Assembler::GetVldrDRegisterImmediateOffset(instr) == 0));
3829 instr, offset));
3832 DCHECK((Assembler::IsLdrPpImmediateOffset(instr) &&
3833 Assembler::GetLdrRegisterImmediateOffset(instr) == 0));
3836 rinfo.pc(), Assembler::SetLdrRegisterImmediateOffset(instr, offset));
