Lines Matching defs:Rm
2010 int rm = instr->RmValue();
2013 int32_t rm_val = get_register(rm);
2019 // Format(instr, "mul'cond's 'rn, 'rm, 'rs");
2031 // of registers as "Rd, Rm, Rs, Rn". But confusingly it uses the
2034 // Format(instr, "mla'cond's 'rn, 'rm, 'rs, 'rd");
2039 // Format(instr, "mls'cond's 'rn, 'rm, 'rs, 'rd");
2055 // Format(instr, "'um'al'cond's 'rd, 'rn, 'rs, 'rm");
2090 int rm = instr->RmValue();
2091 int32_t rm_val = get_register(rm);
2094 // Format(instr, "'memop'cond'sign'h 'rd, ['rn], -'rm");
2102 // Format(instr, "'memop'cond'sign'h 'rd, ['rn], +'rm");
2110 // Format(instr, "'memop'cond'sign'h 'rd, ['rn, -'rm]'w");
2119 // Format(instr, "'memop'cond'sign'h 'rd, ['rn, +'rm]'w");
2218 int rm = instr->RmValue();
2221 set_pc(get_register(rm));
2225 set_pc(get_register(rm));
2239 int rm = instr->RmValue();
2243 uint32_t bits = get_register(rm);
2716 // (s/u)div (in V8 notation matching ARM ISA format) rn = rm/rs
2717 // Format(instr, "'(s/u)div'cond'b 'rn, 'rm, 'rs);
2718 int rm = instr->RmValue();
2719 int32_t rm_val = get_register(rm);
3175 DCHECK((mode == RN) || (mode == RM) || (mode == RZ));
3194 case RM:
3254 DCHECK((mode == RM) || (mode == RZ) || (mode == RN));
3288 case RM:
3503 int Rm = instr->VmValue();
3532 if (Rm != 15) {
3533 if (Rm == 13) {
3536 set_register(Rn, get_register(Rn) + get_register(Rm));
3544 int Rm = instr->VmValue();
3573 if (Rm != 15) {
3574 if (Rm == 13) {
3577 set_register(Rn, get_register(Rn) + get_register(Rm));
