Lines Matching defs:is
2 // Use of this source code is governed by a BSD-style license that can be
43 // The kInvalid value is used to detect uninitialized static instances,
68 bool Is(const CPURegister& other) const;
85 bool is(const CPURegister& other) const { return Is(other); }
139 // TODO(all): Register x25 is currently free and could be available for
163 // Return true if the register is one that crankshaft can allocate.
173 // cp is the last allocatable register.
260 // - d15 which is used to keep the 0 double value
261 // - d30 which is used in crankshaft as a double scratch register
262 // - d31 which is used in the MacroAssembler as a double scratch register
279 // Return true if the register is one that crankshaft can allocate.
343 // No*Reg is used to indicate an unused argument, or an error case. Note that
344 // these all compare equal (using the Is() method). The Register and FPRegister
388 // We chose x28 because it is contiguous with the other specific purpose
509 // the type and size of the register is inferred from this list.
609 // This is allowed to be an implicit constructor because Immediate is
639 // where <shift> is one of {LSL, LSR, ASR, ROR}.
640 // <shift_amount> is uint6_t.
641 // This is allowed to be an implicit constructor because Operand is
648 // where <extend> is one of {UXTB, UXTH, UXTW, UXTX, SXTB, SXTH, SXTW, SXTX}.
649 // <shift_amount> is uint2_t.
774 // Size in bytes of the literal pool *if* it is emitted at the current
812 // If the provided buffer is NULL, the assembler allocates and grows its own
813 // buffer, and buffer_size determines the initial buffer size. The buffer is
816 // If the provided buffer is not NULL, the assembler uses the provided buffer
818 // is too small, a fatal error occurs. No deallocation of the buffer is done
833 // constant pool is not blocked.
837 // desc. GetCode() is idempotent; it returns the same result if no other
840 // The descriptor (desc) can be NULL. In that case, the code is finalized as
841 // usual, but the descriptor is not populated.
893 // This sets the branch destination (which is in the constant pool on ARM).
894 // This is for calls and branches within generated code.
932 // is used primarily to work around comparisons between signed and unsigned
964 // Prevent contant pool emission until EndBlockConstPool is called.
979 // Prevent veneer pool emission until EndBlockVeneerPool is called.
1079 // Calculate a PC-relative address. Unlike for branches the offset in adr is
1508 // that is equal to the 64-bit immediate argument. If an explicit left shift
1509 // is specified (0, 16, 32 or 48), the immediate must be a 16-bit value.
1734 // character. The instruction pointer (pc_) is then aligned correctly for
1884 // Check if is time to emit a constant pool.
1902 // instruction. This is for code size checking purposes, and can be extended
1908 // If need_protection is true, the veneers are protected by a branch jumping
1914 // If force_emit is set, a veneer is generated for *all* unresolved branches.
2061 // This is the same as LinkAndGetByteOffsetTo, but return an offset
2067 // Verify that a label's link chain is intact.
2113 // * the distance to the first use is above a pre-defined distance or
2114 // * the numbers of entries in the pool is above a pre-defined size or
2115 // * code generation is finished
2116 // If a pool needs to be emitted before code generation is finished a branch
2120 // if so, a relocation info entry is associated to the constant pool entry.
2122 // Repeated checking whether the constant pool should be emitted is rather
2124 // has been generated. That also means that the sizing of the buffers is not
2131 // is an approximation.
2135 // pool emission checks are interval based this value is an approximation.
2139 int const_pool_blocked_nesting_; // Block emission if this is not zero.
2143 int veneer_pool_blocked_nesting_; // Block emission if this is not zero.
2146 // Each relocation is encoded as a variable size value
2153 // stored in a separate buffer until a constant pool is emitted.
2154 // If every instruction in a long sequence is accessing the pool, we need one
2161 // member variable is a way to pass the information from the call site to
2177 // The relocation writer's position is at least kGap bytes below the end of
2178 // the generated instructions. This is so that multi-instruction sequences do
2179 // not have to check for overflow. The same is true for writes of large
2197 // The Assembler is only allowed to delete out-of-date information from here
2198 // after a label is bound. The MacroAssembler uses this information to
2202 // member of the pair is the maximum offset that the branch can reach in the
2203 // buffer. The map is sorted according to this reachable offset, allowing to
2213 // The factor of 2 is a finger in the air guess. With a default margin of
2223 // This is similar to next_constant_pool_check_ and helps reduce the overhead
2225 // It is maintained to the closest unresolved branch limit minus the maximum
2230 // If a veneer is emitted for a branch instruction, that instruction must be
2237 // if pending unresolved information exists. Its complexity is proportional to
2251 // The buffer size is
2253 // Where kGap is the distance from which the Assembler tries to grow the