Lines Matching defs:bits
72 void SimSystemRegister::SetBits(int msb, int lsb, uint32_t bits) {
74 DCHECK(is_uintn(bits, width) || is_intn(bits, width));
76 bits <<= lsb;
80 value_ = (value_ & ~mask) | (bits & mask);
132 set_xreg(index_x++, arg.bits());
134 set_dreg_bits(index_d++, arg.bits());
137 stack_args.push_back(arg.bits());
310 // Extending the stack by 2 * 64 bits is required for stack alignment purposes.
513 // The simulator assumes all runtime calls return two 64-bits values. If they
1092 // The template is "# v<code>:bits (d<code>:value, ...)".
1097 // Print the raw bits.
1172 // The template is "# reg:bits (reg:value) <- address".
1235 // The template is "# reg:bits (reg:value) -> address". To keep the trace tidy
2048 // Shift distance encoded in the least-significant five/six bits of the
2503 // encodable as a float, but rounding based on the low-order mantissa bits
2515 // These bits fit into the result.
2523 // For subnormal outputs, the range of representable bits is smaller and
2562 // If all bits in the exponent are set, the value is infinite or NaN.
2647 int64_t bits =
2652 return rawbits_to_double(bits);
2659 int32_t bits =
2664 return rawbits_to_float(bits);
2785 // (low-order) payload bits are set to 0.
2791 payload <<= (52 - 23); // The unused low-order bits should be 0.
