Lines Matching full:instruction
56 void Stop(Instruction* instr);
78 bool SetBreakpoint(Instruction* breakpc);
79 bool DeleteBreakpoint(Instruction* breakpc);
104 void MipsDebugger::Stop(Instruction* instr) {
123 // Overwrite the instruction and address with nops.
127 sim_->set_pc(sim_->get_pc() + 2 * Instruction::kInstructionSize);
133 #define UNSUPPORTED() printf("Unsupported instruction.\n");
138 void MipsDebugger::Stop(Instruction* instr) {
143 Instruction::kInstrSize);
149 sim_->set_pc(sim_->get_pc() + 2 * Instruction::kInstrSize);
239 bool MipsDebugger::SetBreakpoint(Instruction* breakpc) {
248 // Not setting the breakpoint instruction in the code itself. It will be set
254 bool MipsDebugger::DeleteBreakpoint(Instruction* breakpc) {
446 Instruction* instr = reinterpret_cast<Instruction*>(sim_->get_pc());
450 reinterpret_cast<Instruction*>(sim_->get_pc()));
454 sim_->set_pc(sim_->get_pc() + Instruction::kInstrSize);
457 // Execute the one instruction we broke at with breakpoints disabled.
458 sim_->InstructionDecode(reinterpret_cast<Instruction*>(sim_->get_pc()));
620 end = cur + (10 * Instruction::kInstrSize);
629 end = cur + (10 * Instruction::kInstrSize);
637 end = cur + (value * Instruction::kInstrSize);
645 end = cur + (value2 * Instruction::kInstrSize);
653 cur += Instruction::kInstrSize;
663 if (!SetBreakpoint(reinterpret_cast<Instruction*>(value))) {
681 2 * Instruction::kInstrSize;
682 Instruction* stop_instr = reinterpret_cast<Instruction*>(stop_pc);
683 Instruction* msg_address =
684 reinterpret_cast<Instruction*>(stop_pc +
685 Instruction::kInstrSize);
754 end = cur + (10 * Instruction::kInstrSize);
760 end = cur + (10 * Instruction::kInstrSize);
767 end = cur + (value2 * Instruction::kInstrSize);
775 cur += Instruction::kInstrSize;
781 PrintF(" step one instruction (alias 'si')\n");
822 PrintF(" ignore the stop instruction at the current location\n");
919 Instruction* instr) {
932 Instruction::kInstrSize));
1000 // reference to a swi (software-interrupt) instruction that is handled by
1002 // offset from the swi instruction so the simulator knows what to call.
1015 Instruction::kInstrSize);
1036 static Redirection* FromSwiInstruction(Instruction* swi_instruction) {
1045 reinterpret_cast<Instruction*>(reinterpret_cast<void*>(reg)));
1152 return registers_[reg] + ((reg == pc) ? Instruction::kPCReadOffset : 0);
1333 int Simulator::ReadW(int32_t addr, Instruction* instr) {
1354 void Simulator::WriteW(int32_t addr, int value, Instruction* instr) {
1375 double Simulator::ReadD(int32_t addr, Instruction* instr) {
1388 void Simulator::WriteD(int32_t addr, double value, Instruction* instr) {
1401 uint16_t Simulator::ReadHU(int32_t addr, Instruction* instr) {
1414 int16_t Simulator::ReadH(int32_t addr, Instruction* instr) {
1427 void Simulator::WriteH(int32_t addr, uint16_t value, Instruction* instr) {
1440 void Simulator::WriteH(int32_t addr, int16_t value, Instruction* instr) {
1486 void Simulator::Format(Instruction* instr, const char* format) {
1487 PrintF("Simulator found unsupported instruction:\n 0x%08x: %s\n",
1524 void Simulator::SoftwareInterrupt(Instruction* instr) {
1526 // the break_ instruction, or several variants of traps. All
1773 void Simulator::HandleStop(uint32_t code, Instruction* instr) {
1780 set_pc(get_pc() + 2 * Instruction::kInstrSize);
1785 bool Simulator::IsStopInstruction(Instruction* instr) {
1859 // Handle execution based on instruction types.
1861 void Simulator::ConfigureTypeRegister(Instruction* instr,
1872 // Instruction fields.
1931 // bits instruction. RS field is always equal to 0.
1935 instruction, added in MIPS32 Release 2.
1949 // bits instruction. SA field is always equal to 0.
1953 // This is special case od SRLV instruction, added in MIPS32
2102 case INS: { // Mips32r2 instruction.
2112 case EXT: { // Mips32r2 instruction.
2132 void Simulator::DecodeTypeRegister(Instruction* instr) {
2133 // Instruction fields.
2165 // Set up the variables if needed before executing the instruction.
2336 case TRUNC_L_D: { // Mips32r2 instruction.
2347 case ROUND_L_D: { // Mips32r2 instruction.
2359 case FLOOR_L_D: // Mips32r2 instruction.
2368 case CEIL_L_D: // Mips32r2 instruction.
2402 case CVT_D_L: // Mips32r2 instruction.
2493 Instruction* branch_delay_instr = reinterpret_cast<Instruction*>(
2494 current_pc+Instruction::kInstrSize);
2501 Instruction* branch_delay_instr = reinterpret_cast<Instruction*>(
2502 current_pc+Instruction::kInstrSize);
2505 current_pc + 2 * Instruction::kInstrSize);
2677 void Simulator::DecodeTypeImmediate(Instruction* instr) {
2678 // Instruction fields.
2727 next_pc = current_pc + (imm16 << 2) + Instruction::kInstrSize;
2738 next_pc = current_pc + (imm16 << 2) + Instruction::kInstrSize;
2749 next_pc = current_pc + (imm16 << 2) + Instruction::kInstrSize;
2785 next_pc = current_pc + (imm16 << 2) + Instruction::kInstrSize;
2943 next_pc = current_pc + (imm16 << 2) + Instruction::kInstrSize;
2945 set_register(31, current_pc + 2* Instruction::kInstrSize);
2948 next_pc = current_pc + 2 * Instruction::kInstrSize;
3011 Instruction* branch_delay_instr =
3012 reinterpret_cast<Instruction*>(current_pc+Instruction::kInstrSize);
3024 void Simulator::DecodeTypeJump(Instruction* instr) {
3035 Instruction* branch_delay_instr =
3036 reinterpret_cast<Instruction*>(current_pc + Instruction::kInstrSize);
3042 set_register(31, current_pc + 2 * Instruction::kInstrSize);
3049 // Executes the current instruction.
3050 void Simulator::InstructionDecode(Instruction* instr) {
3066 case Instruction::kRegisterType:
3069 case Instruction::kImmediateType:
3072 case Instruction::kJumpType:
3080 Instruction::kInstrSize);
3092 // should be stopping at a particular executed instruction.
3094 Instruction* instr = reinterpret_cast<Instruction*>(program_counter);
3103 Instruction* instr = reinterpret_cast<Instruction*>(program_counter);
