Lines Matching defs:isSub
1855 void setFlags_ADD_SUB ( Bool is64, Bool isSUB, IRTemp argL, IRTemp argR )
1871 /**/ if ( isSUB && is64) { cc_op = ARM64G_CC_OP_SUB64; }
1872 else if ( isSUB && !is64) { cc_op = ARM64G_CC_OP_SUB32; }
1873 else if (!isSUB && is64) { cc_op = ARM64G_CC_OP_ADD64; }
1874 else if (!isSUB && !is64) { cc_op = ARM64G_CC_OP_ADD32; }
1913 Bool is64, Bool isSUB,
1931 /**/ if ( isSUB && is64) { t_op = ARM64G_CC_OP_SUB64; }
1932 else if ( isSUB && !is64) { t_op = ARM64G_CC_OP_SUB32; }
1933 else if (!isSUB && is64) { t_op = ARM64G_CC_OP_ADD64; }
1934 else if (!isSUB && !is64) { t_op = ARM64G_CC_OP_ADD32; }
2406 Bool isSub = INSN(30,30) == 1;
2412 const HChar* nm = isSub ? "sub" : "add";
2424 assign(res, binop(isSub ? Iop_Sub64 : Iop_Add64,
2428 setFlags_ADD_SUB(True/*is64*/, isSub, argL, argR);
2442 assign(res, binop(isSub ? Iop_Sub32 : Iop_Add32,
2446 setFlags_ADD_SUB(False/*!is64*/, isSub, argL, argR);
2816 Bool isSUB = bOP == 1;
2825 IROp op = isSUB ? mkSUB(ty) : mkADD(ty);
2830 setFlags_ADD_SUB(is64, isSUB, argL, argR);
2859 Bool isSUB = bOP == 1;
2873 IROp op = isSUB ? mkSUB(ty) : mkADD(ty);
2875 if (isSUB) {
2892 setFlags_ADC_SBC(is64, isSUB, argL, argR, oldC);
3097 Bool isSub = INSN(30,30) == 1;
3150 assign(res, binop(isSub ? Iop_Sub64 : Iop_Add64,
3155 setFlags_ADD_SUB(True/*is64*/, isSub, argL, argR);
3166 setFlags_ADD_SUB(False/*!is64*/, isSub, argL32, argR32);
3172 isSub ? "sub" : "add", setCC ? "s" : "",
3194 Bool isSUB = INSN(30,30) == 1;
3214 setFlags_ADD_SUB_conditionally(is64, isSUB, condT, argL, argR, nzcv);
3217 isSUB ? 'p' : 'n', nameIRegOrZR(is64, nn),
3233 Bool isSUB = INSN(30,30) == 1;
3253 setFlags_ADD_SUB_conditionally(is64, isSUB, condT, argL, argR, nzcv);
3256 isSUB ? 'p' : 'n', nameIRegOrZR(is64, nn),
9658 Bool isSUB = bitU == 1;
9660 assign(res, binop(isSUB ? Iop_Sub64 : Iop_Add64,
9665 DIP("%s %s, %s, %s\n", isSUB ? "sub" : "add",
10161 Bool isSUB = opcode == BITS4(0,1,0,1);
10180 assign(t2, triop(isSUB ? opSUB : opADD,
10186 DIP("%s %c%u, %c%u, %s.%c[%u]\n", isSUB ? "fmls" : "fmla",
11381 Bool isSUB = bitU == 1;
11382 IROp op = isSUB ? mkVecSUB(size) : mkVecADD(size);
11386 const HChar* nm = isSUB ? "sub" : "add";
11563 Bool isSUB = (size & 2) == 2;
11574 assign(t2, triop(isSUB ? opSUB : opADD,
11578 DIP("%s %s.%s, %s.%s, %s.%s\n", isSUB ? "fmls" : "fmla",
11587 Bool isSUB = (size & 2) == 2;
11599 DIP("%s %s.%s, %s.%s, %s.%s\n", isSUB ? "fsub" : "fadd",
12493 Bool isSUB = opcode == BITS4(0,1,0,1);
12512 assign(t2, triop(isSUB ? opSUB : opADD,
12516 DIP("%s %s.%s, %s.%s, %s.%c[%u]\n", isSUB ? "fmls" : "fmla",
