Lines Matching defs:one
90 Following that, one of the following 3 are allowed
1726 after a shift or rotate, not just this one.
2600 instruction halfwords (the lowest addressed one is I0). */
3211 ULong one = 1;
3214 case 0: one = (one << 8) | one; /* fall through */
3215 case 1: one = (one << 16) | one; /* fall through */
3216 case 2: one = (one << 32) | one; break;
3267 mkU64(one),
3268 mkU64(one))),
3272 mkU64(one),
3273 mkU64(one)))),
3275 mkU64(one),
3276 mkU64(one))),
3294 mkU64(one)),
3297 mkU64(one))),
3298 mkU64(one)),
5919 /* It is one reg and immediate */
7570 /* A7.4.6 One register and a modified immediate value */
8358 (1) VSTn / VLDn (n-element structure from/to one lane)
8366 VSTn / VLDn (n-element structure from/to one lane) */
12877 /* offset must be odd, and specify at least one register */
13014 /* offset must be even, and specify at least one register */
13806 /* offset must specify at least one register */
14658 /* Got a "Special" instruction preamble. Which one is it? */
14723 condT :: Ity_I32 and is always either zero or one. */
15569 /* First see if we can do some speculative chasing into one
15580 one, on the negation of the condition, and continue at
15601 following this one. */
17342 generates more than one possible new value for r15. Hence
17498 /* Got a "Special" instruction preamble. Which one is it? */
17771 one. */
18424 /* Looks like the nearest insn we can branch to is the one after
18450 * SP being one of the transferred registers
18459 /* At least one register must be transferred, else result is
18513 /* At least one register must be transferred, else result is
19217 /* One further validity case to check: in the case of BLX
20028 where op is one of
20219 where op is one of
20371 where op is one of
