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Lines Matching refs:Aalu_OR

799                     Aalu_OR, AMD64RMI_Imm(DEFAULT_MXCSR), reg));
828    addInstr(env, AMD64Instr_Alu64R(Aalu_OR, 
990             aluOp = Aalu_OR; break;
1269          addInstr(env, AMD64Instr_Alu64R(Aalu_OR, AMD64RMI_Reg(rdx), dst));
1283                           Aalu_OR, AMD64RMI_Reg(lo32), hi32));
1298                           Aalu_OR, AMD64RMI_Reg(lo16), hi16));
1313                           Aalu_OR, AMD64RMI_Reg(lo8), hi8));
1430             case Iop_Or32:  aluOp = Aalu_OR;  break;
1570             addInstr(env, AMD64Instr_Alu64R(Aalu_OR,
1584             addInstr(env, AMD64Instr_Alu64R(Aalu_OR,
1598             addInstr(env, AMD64Instr_Alu64R(Aalu_OR, AMD64RMI_Reg(src), dst));
2301          addInstr(env, AMD64Instr_Alu64R(Aalu_OR,rmi1,tmp));