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51    providing we can arrange for the dst to have the same spill slot.
66 /* The "home" spill slot, if needed. Never changes. */
105 spill. */
108 rreg has the same value as the spill slot for the associated
110 spill store or reload for this rreg. */
148 sequence. Point is to select a virtual register to spill, by
154 caller to arbitrarily restrict the set of spill candidates to be
162 spill, or -1 if none was found. */
193 /* Check that this vreg has been assigned a sane spill offset. */
375 /* Return one, or, if we're unlucky, two insn(s) to spill/restore a
376 real reg to a spill slot byte offset. The two leading HInstr**
380 directly from a specified spill slot. May be NULL, in which
617 that when allocating spill slots. */
858 /* --------- Stage 3: allocate spill slots. --------- */
860 /* Each spill slot is 8 bytes long. For vregs which take more than
861 64 bits to spill (classes Flt64 and Vec128), we have to allocate
862 two consecutive spill slots. For 256 bit registers (class
863 Vec256), we have to allocate four consecutive spill slots.
865 For Vec128-class on PowerPC, the spill slot's actual address
866 must be 16-byte aligned. Since the spill slot's address is
870 choosing a 16-aligned spill slot offset for Vec128-class values.
871 Since each spill slot is 8 bytes long, that means for
872 Vec128-class values we must allocated a spill slot number which
875 Similarly, for Vec256 class on amd64, find a spill slot number
878 etc to spill), but seems like good practice.
880 Do a rank-based allocation of vregs to spill slot numbers. We
881 put as few values as possible in spill slots, but nevertheless
882 need to have a spill slot available for all vregs, just in case.
897 /* The spill slots are 64 bits in size. As per the comment on
899 to spill a vreg of class Flt64 or Vec128, we'll need to find
900 two adjacent spill slots to use. For Vec256, we'll need to
909 provide up to 128 bits in which to spill the vreg.
925 /* The ordinary case -- just find a single spill slot. */
926 /* Find the lowest-numbered spill slot which is available
943 it for two sets of shadow state, and then the spill area. */
955 vex_printf("vreg %d --> spill offset %d\n",
1139 hence with a different spill slot. Play safe. */
1179 is correct is to spill the rreg.
1218 /* Yes, there is an associated vreg. Spill it if it's
1256 This may generate spill stores since we may have to evict
1257 some vregs currently in rregs. Also generates spill loads.
1266 in a spill slot, and this is last use of that vreg, see if we
1268 the spill slot. This is clearly only possible for x86 and
1353 from any spill slot value. */
1411 spill slot, but not so if it is modified. */
1425 /* Well, now we have no option but to spill a vreg. It's
1426 important to make a good choice of vreg to spill, and of
1427 course we need to be careful not to spill a vreg which is
1430 /* First, mark in the rreg_state, those rregs which are not spill
1450 /* We can choose to spill any rreg satisfying
1460 /* Hmmmmm. There don't appear to be any spill candidates.
1468 /* Right. So we're going to spill rreg_state[spillee]. */
1480 /* So here's the spill store. Assert that we're spilling a
1522 spill slot, but not so if it is modified. */
1542 - spill and reload instructions may have been emitted.