Lines Matching refs:mode64
47 const RRegUniverse* getRRegUniverse_PPC ( Bool mode64 )
59 UInt howNeeded = mode64 ? 2 : 1;
71 ru->regs[ru->size++] = hregPPC_GPR3(mode64);
72 ru->regs[ru->size++] = hregPPC_GPR4(mode64);
73 ru->regs[ru->size++] = hregPPC_GPR5(mode64);
74 ru->regs[ru->size++] = hregPPC_GPR6(mode64);
75 ru->regs[ru->size++] = hregPPC_GPR7(mode64);
76 ru->regs[ru->size++] = hregPPC_GPR8(mode64);
77 ru->regs[ru->size++] = hregPPC_GPR9(mode64);
78 ru->regs[ru->size++] = hregPPC_GPR10(mode64);
79 if (!mode64) {
80 /* in mode64:
83 ru->regs[ru->size++] = hregPPC_GPR11(mode64);
84 ru->regs[ru->size++] = hregPPC_GPR12(mode64);
88 ru->regs[ru->size++] = hregPPC_GPR14(mode64);
89 ru->regs[ru->size++] = hregPPC_GPR15(mode64);
90 ru->regs[ru->size++] = hregPPC_GPR16(mode64);
91 ru->regs[ru->size++] = hregPPC_GPR17(mode64);
92 ru->regs[ru->size++] = hregPPC_GPR18(mode64);
93 ru->regs[ru->size++] = hregPPC_GPR19(mode64);
94 ru->regs[ru->size++] = hregPPC_GPR20(mode64);
95 ru->regs[ru->size++] = hregPPC_GPR21(mode64);
96 ru->regs[ru->size++] = hregPPC_GPR22(mode64);
97 ru->regs[ru->size++] = hregPPC_GPR23(mode64);
98 ru->regs[ru->size++] = hregPPC_GPR24(mode64);
99 ru->regs[ru->size++] = hregPPC_GPR25(mode64);
100 ru->regs[ru->size++] = hregPPC_GPR26(mode64);
101 ru->regs[ru->size++] = hregPPC_GPR27(mode64);
102 ru->regs[ru->size++] = hregPPC_GPR28(mode64);
112 ru->regs[ru->size++] = hregPPC_FPR14(mode64);
113 ru->regs[ru->size++] = hregPPC_FPR15(mode64);
114 ru->regs[ru->size++] = hregPPC_FPR16(mode64);
115 ru->regs[ru->size++] = hregPPC_FPR17(mode64);
116 ru->regs[ru->size++] = hregPPC_FPR18(mode64);
117 ru->regs[ru->size++] = hregPPC_FPR19(mode64);
118 ru->regs[ru->size++] = hregPPC_FPR20(mode64);
119 ru->regs[ru->size++] = hregPPC_FPR21(mode64);
125 ru->regs[ru->size++] = hregPPC_VR20(mode64);
126 ru->regs[ru->size++] = hregPPC_VR21(mode64);
127 ru->regs[ru->size++] = hregPPC_VR22(mode64);
128 ru->regs[ru->size++] = hregPPC_VR23(mode64);
129 ru->regs[ru->size++] = hregPPC_VR24(mode64);
130 ru->regs[ru->size++] = hregPPC_VR25(mode64);
131 ru->regs[ru->size++] = hregPPC_VR26(mode64);
132 ru->regs[ru->size++] = hregPPC_VR27(mode64);
136 ru->regs[ru->size++] = hregPPC_GPR1(mode64);
137 ru->regs[ru->size++] = hregPPC_GPR29(mode64);
138 ru->regs[ru->size++] = hregPPC_GPR30(mode64);
139 ru->regs[ru->size++] = hregPPC_GPR31(mode64);
140 ru->regs[ru->size++] = hregPPC_VR29(mode64);
703 PPCInstr* PPCInstr_LI ( HReg dst, ULong imm64, Bool mode64 )
709 if (!mode64)
846 HReg dst, PPCAMode* src, Bool mode64 ) {
853 if (sz == 8) vassert(mode64);
857 HReg dst, HReg src, Bool mode64 )
865 if (sz == 8) vassert(mode64);
869 Bool mode64 ) {
876 if (sz == 8) vassert(mode64);
879 PPCInstr* PPCInstr_StoreC ( UChar sz, HReg dst, HReg src, Bool mode64 ) {
886 if (sz == 8) vassert(mode64);
1432 static void ppLoadImm ( HReg dst, ULong imm, Bool mode64 ) {
1435 if (!mode64) {
1451 void ppPPCInstr ( const PPCInstr* i, Bool mode64 )
1455 ppLoadImm(i->Pin.LI.dst, i->Pin.LI.imm64, mode64);
1558 ppLoadImm(hregPPC_GPR10(mode64), i->Pin.Call.target, mode64);
1576 if (mode64) {
1585 if (mode64) {
1598 vex_printf("%s ", mode64 ? "std" : "stw");
1603 vex_printf("imm%s r30,$disp_cp_xindir; ", mode64 ? "64" : "32");
1610 vex_printf("%s ", mode64 ? "std" : "stw");
1617 vex_printf("imm%s r30,$disp_cp_xindir; ", mode64 ? "64" : "32");
1631 ppLoadImm(i->Pin.CMov.dst, i->Pin.CMov.src->Pri.Imm, mode64);
1844 ppLoadImm(hregPPC_GPR30(mode64),
1845 i->Pin.AvLdSt.addr->Pam.IR.index, mode64);
1950 ppLoadImm(hregPPC_GPR30(mode64),
1951 i->Pin.AvSh.addr->Pam.IR.index, mode64);
2209 if (mode64) {
2226 void getRegUsage_PPCInstr ( HRegUsage* u, const PPCInstr* i, Bool mode64 )
2273 mode64: r3 to r10
2279 addHRegUse(u, HRmWrite, hregPPC_GPR3(mode64));
2280 addHRegUse(u, HRmWrite, hregPPC_GPR4(mode64));
2281 addHRegUse(u, HRmWrite, hregPPC_GPR5(mode64));
2282 addHRegUse(u, HRmWrite, hregPPC_GPR6(mode64));
2283 addHRegUse(u, HRmWrite, hregPPC_GPR7(mode64));
2284 addHRegUse(u, HRmWrite, hregPPC_GPR8(mode64));
2285 addHRegUse(u, HRmWrite, hregPPC_GPR9(mode64));
2286 addHRegUse(u, HRmWrite, hregPPC_GPR10(mode64));
2287 if (!mode64) {
2288 addHRegUse(u, HRmWrite, hregPPC_GPR11(mode64));
2289 addHRegUse(u, HRmWrite, hregPPC_GPR12(mode64));
2295 if (argir &(1<<10)) addHRegUse(u, HRmRead, hregPPC_GPR10(mode64));
2296 if (argir & (1<<9)) addHRegUse(u, HRmRead, hregPPC_GPR9(mode64));
2297 if (argir & (1<<8)) addHRegUse(u, HRmRead, hregPPC_GPR8(mode64));
2298 if (argir & (1<<7)) addHRegUse(u, HRmRead, hregPPC_GPR7(mode64));
2299 if (argir & (1<<6)) addHRegUse(u, HRmRead, hregPPC_GPR6(mode64));
2300 if (argir & (1<<5)) addHRegUse(u, HRmRead, hregPPC_GPR5(mode64));
2301 if (argir & (1<<4)) addHRegUse(u, HRmRead, hregPPC_GPR4(mode64));
2302 if (argir & (1<<3)) addHRegUse(u, HRmRead, hregPPC_GPR3(mode64));
2311 addHRegUse(u, HRmWrite, hregPPC_GPR10(mode64));
2415 addHRegUse(u, HRmWrite, hregPPC_GPR30(mode64));
2460 addHRegUse(u, HRmWrite, hregPPC_VR29(mode64));
2481 addHRegUse(u, HRmWrite, hregPPC_GPR30(mode64));
2615 addHRegUse(u, HRmWrite, hregPPC_GPR30(mode64)); /* also unavail to RA */
2618 addHRegUse(u, HRmWrite, hregPPC_GPR29(mode64));
2619 addHRegUse(u, HRmWrite, hregPPC_GPR30(mode64));
2622 ppPPCInstr(i, mode64);
2633 void mapRegs_PPCInstr ( HRegRemap* m, PPCInstr* i, Bool mode64 )
2954 ppPPCInstr(i, mode64);
2995 HReg rreg, Int offsetB, Bool mode64 )
3000 am = PPCAMode_IR( offsetB, GuestStatePtr(mode64) );
3003 vassert(mode64);
3004 *i1 = PPCInstr_Store( 8, am, rreg, mode64 );
3007 vassert(!mode64);
3008 *i1 = PPCInstr_Store( 4, am, rreg, mode64 );
3025 HReg rreg, Int offsetB, Bool mode64 )
3030 am = PPCAMode_IR( offsetB, GuestStatePtr(mode64) );
3033 vassert(mode64);
3034 *i1 = PPCInstr_Load( 8, rreg, am, mode64 );
3037 vassert(!mode64);
3038 *i1 = PPCInstr_Load( 4, rreg, am, mode64 );
3056 inline static UInt iregEnc ( HReg r, Bool mode64 )
3059 vassert(hregClass(r) == (mode64 ? HRcInt64 : HRcInt32));
3354 PPCAMode* am, Bool mode64, VexEndness endness_host )
3360 rA = iregEnc(am->Pam.IR.base, mode64);
3363 if (opc1 == 58 || opc1 == 62) { // ld/std: mode64 only
3364 vassert(mode64);
3374 UInt rSD, PPCAMode* am, Bool mode64,
3380 rA = iregEnc(am->Pam.RR.base, mode64);
3381 rB = iregEnc(am->Pam.RR.index, mode64);
3389 static UChar* mkLoadImm ( UChar* p, UInt r_dst, ULong imm, Bool mode64,
3394 if (!mode64) {
3419 vassert(mode64);
3452 UInt r_dst, ULong imm, Bool mode64,
3457 if (!mode64) {
3466 if (!mode64) {
3498 UInt r_dst, ULong imm, Bool mode64,
3503 if (!mode64) {
3512 if (!mode64) {
3561 UInt reg, PPCAMode* am, Bool mode64, VexEndness endness_host )
3564 UInt opc1, sz = mode64 ? 8 : 4;
3567 if (mode64) {
3571 case 4: opc1 = 32; vassert(!mode64); break;
3572 case 8: opc1 = 58; vassert(mode64); break;
3575 p = doAMode_IR(p, opc1, reg, am, mode64, endness_host);
3585 UInt opc1, sz = mode64 ? 8 : 4;
3588 if (mode64) {
3592 case 4: opc1 = 36; vassert(!mode64); break;
3593 case 8: opc1 = 62; vassert(mode64); break;
3596 p = doAMode_IR(p, opc1, reg, am, mode64, endness_host);
3613 UInt reg, PPCAMode* am, Bool mode64, VexEndness endness_host )
3619 if (mode64) {
3623 p = doAMode_IR(p, opc1, reg, am, mode64, endness_host);
3636 if (mode64) {
3640 p = doAMode_IR(p, opc1, reg, am, mode64, endness_host);
3734 Bool mode64, VexEndness endness_host,
3744 vex_printf("asm ");ppPPCInstr(i, mode64); vex_printf("\n");
3750 p = mkLoadImm(p, iregEnc(i->Pin.LI.dst, mode64),
3751 i->Pin.LI.imm64, mode64, endness_host);
3757 UInt r_dst = iregEnc(i->Pin.Alu.dst, mode64);
3758 UInt r_srcL = iregEnc(i->Pin.Alu.srcL, mode64);
3760 iregEnc(srcR->Prh.Reg.reg, mode64);
3831 UInt r_dst = iregEnc(i->Pin.Shft.dst, mode64);
3832 UInt r_srcL = iregEnc(i->Pin.Shft.srcL, mode64);
3834 iregEnc(srcR->Prh.Reg.reg, mode64);
3835 if (!mode64)
3912 if (mode64)
3944 UInt r_srcL = iregEnc(i->Pin.AddSubC.srcL, mode64);
3945 UInt r_srcR = iregEnc(i->Pin.AddSubC.srcR, mode64);
3946 UInt r_dst = iregEnc(i->Pin.AddSubC.dst, mode64);
3967 UInt r_srcL = iregEnc(i->Pin.Cmp.srcL, mode64);
3971 if (!mode64) // cmp double word invalid for mode32
3973 else if (!sz32) // mode64 && cmp64: set L=1
3988 r_srcR = iregEnc(srcR->Prh.Reg.reg, mode64);
4001 UInt r_dst = iregEnc(i->Pin.Unary.dst, mode64);
4002 UInt r_src = iregEnc(i->Pin.Unary.src, mode64);
4015 vassert(mode64);
4019 vassert(mode64);
4030 UInt r_dst = iregEnc(i->Pin.MulL.dst, mode64);
4031 UInt r_srcL = iregEnc(i->Pin.MulL.srcL, mode64);
4032 UInt r_srcR = iregEnc(i->Pin.MulL.srcR, mode64);
4034 if (!mode64)
4067 UInt r_dst = iregEnc(i->Pin.Div.dst, mode64);
4068 UInt r_srcL = iregEnc(i->Pin.Div.srcL, mode64);
4069 UInt r_srcR = iregEnc(i->Pin.Div.srcR, mode64);
4071 if (!mode64)
4135 p = mkLoadImm(p, r_dst, i->Pin.Call.target, mode64, endness_host);
4177 if (!mode64) vassert(0 == (((ULong)i->Pin.XDirect.dstGA) >> 32));
4178 p = mkLoadImm(p, /*r*/30, (ULong)i->Pin.XDirect.dstGA, mode64,
4183 /*r*/30, i->Pin.XDirect.amCIA, mode64, endness_host
4196 p, /*r*/30, (Addr)disp_cp_chain_me, mode64, endness_host);
4239 iregEnc(i->Pin.XIndir.dstGA, mode64),
4240 i->Pin.XIndir.amCIA, mode64, endness_host
4244 p = mkLoadImm(p, /*r*/30, (ULong)(Addr)disp_cp_xindir, mode64,
4279 iregEnc(i->Pin.XIndir.dstGA, mode64),
4280 i->Pin.XIndir.amCIA, mode64, endness_host
4309 p = mkLoadImm(p, /*r*/31, trcval, mode64, endness_host);
4313 (ULong)(Addr)disp_cp_xassisted, mode64,
4337 r_dst = iregEnc(i->Pin.CMov.dst, mode64);
4353 p = mkLoadImm(p, r_dst, imm_src, mode64, endness_host); // p += 4|8|20
4356 r_src = iregEnc(i->Pin.CMov.src->Pri.Reg, mode64);
4375 UInt r_dst = iregEnc(i->Pin.Load.dst, mode64);
4379 if (mode64 && (sz == 4 || sz == 8)) {
4387 case 8: opc1 = 58; vassert(mode64); break;
4390 p = doAMode_IR(p, opc1, r_dst, am_addr, mode64, endness_host);
4397 case 8: opc2 = 21; vassert(mode64); break;
4400 p = doAMode_RR(p, 31, opc2, r_dst, am_addr, mode64, endness_host);
4409 p = mkFormX(p, 31, iregEnc(i->Pin.LoadL.dst, mode64),
4410 0, iregEnc(i->Pin.LoadL.src, mode64), 52, 0, endness_host);
4414 p = mkFormX(p, 31, iregEnc(i->Pin.LoadL.dst, mode64),
4415 0, iregEnc(i->Pin.LoadL.src, mode64), 116, 0, endness_host);
4419 p = mkFormX(p, 31, iregEnc(i->Pin.LoadL.dst, mode64),
4420 0, iregEnc(i->Pin.LoadL.src, mode64), 20, 0, endness_host);
4423 if (i->Pin.LoadL.sz == 8 && mode64) {
4424 p = mkFormX(p, 31, iregEnc(i->Pin.LoadL.dst, mode64),
4425 0, iregEnc(i->Pin.LoadL.src, mode64), 84, 0, endness_host);
4434 UInt r_dst = iregEnc(i->Pin.Set.dst, mode64);
4463 p = mkFormX(p, 31, iregEnc(i->Pin.MfCR.dst, mode64), 0, 0, 19, 0,
4476 UInt r_src = iregEnc(i->Pin.Store.src, mode64);
4480 if (mode64 && (sz == 4 || sz == 8)) {
4488 case 8: vassert(mode64);
4493 p = doAMode_IR(p, opc1, r_src, am_addr, mode64, endness_host);
4500 case 8: vassert(mode64);
4505 p = doAMode_RR(p, 31, opc2, r_src, am_addr, mode64, endness_host);
4515 p = mkFormX(p, 31, iregEnc(i->Pin.StoreC.src, mode64),
4516 0, iregEnc(i->Pin.StoreC.dst, mode64), 694, 1, endness_host);
4520 p = mkFormX(p, 31, iregEnc(i->Pin.StoreC.src, mode64),
4521 0, iregEnc(i->Pin.StoreC.dst, mode64), 726, 1, endness_host);
4526 p = mkFormX(p, 31, iregEnc(i->Pin.StoreC.src, mode64),
4527 0, iregEnc(i->Pin.StoreC.dst, mode64), 150, 1, endness_host);
4530 if (i->Pin.StoreC.sz == 8 && mode64) {
4531 p = mkFormX(p, 31, iregEnc(i->Pin.StoreC.src, mode64),
4532 0, iregEnc(i->Pin.StoreC.dst, mode64), 214, 1, endness_host);
4652 p = doAMode_RR(p, 31, opc, f_reg, am_addr, mode64, endness_host);
4655 p = doAMode_IR(p, opc, f_reg, am_addr, mode64, endness_host);
4660 p = doAMode_RR(p, 31, opc, f_reg, am_addr, mode64, endness_host);
4663 p = doAMode_IR(p, opc, f_reg, am_addr, mode64, endness_host);
4670 UInt ir_addr = iregEnc(i->Pin.FpSTFIW.addr, mode64);
4758 UInt r_dst = iregEnc(i->Pin.FpCmp.dst, mode64);
4775 UInt reg = iregEnc(i->Pin.RdWrLR.gpr, mode64);
4791 r_base = iregEnc(i->Pin.AvLdSt.addr->Pam.RR.base, mode64);
4797 i->Pin.AvLdSt.addr->Pam.IR.index, mode64, endness_host);
4799 r_idx = iregEnc(i->Pin.AvLdSt.addr->Pam.RR.index, mode64);
5224 r_base = iregEnc(i->Pin.AvSh.addr->Pam.RR.base, mode64);
5229 i->Pin.AvSh.addr->Pam.IR.index, mode64, endness_host);
5231 r_idx = iregEnc(i->Pin.AvSh.addr->Pam.RR.index, mode64);
5707 mode64);
5725 UInt r_dst = iregEnc(i->Pin.Dfp128Cmp.dst, mode64);
5767 i->Pin.EvCheck.amCounter, mode64,
5773 i->Pin.EvCheck.amCounter, mode64,
5779 i->Pin.EvCheck.amFailAddr, mode64,
5812 if (mode64) {
5814 p, /*r*/30, 0x6555655565556555ULL, True/*mode64*/, endness_host);
5820 p, /*r*/30, 0x65556555ULL, False/*!mode64*/, endness_host);
5840 ppPPCInstr(i, mode64);
5865 Bool mode64 )
5867 if (mode64) {
5887 mode64, endness_host));
5888 vassert(fetch32(p + (mode64 ? 20 : 8) + 0, endness_host) == 0x7FC903A6);
5889 vassert(fetch32(p + (mode64 ? 20 : 8) + 4, endness_host) == 0x4E800421);
5901 (Addr)place_to_jump_to, mode64,
5907 vassert(len == (mode64 ? 28 : 16)); /* stay sane */
5919 Bool mode64 )
5921 if (mode64) {
5941 mode64, endness_host));
5942 vassert(fetch32(p + (mode64 ? 20 : 8) + 0, endness_host) == 0x7FC903A6);
5943 vassert(fetch32(p + (mode64 ? 20 : 8) + 4, endness_host) == 0x4E800420);
5955 (Addr)disp_cp_chain_me, mode64,
5961 vassert(len == (mode64 ? 28 : 16)); /* stay sane */
5972 Bool mode64 )
5974 if (mode64) {
5985 if (mode64) {
5987 0x6555655565556555ULL, True/*mode64*/,
5994 True/*mode64*/, endness_host);
5999 0x65556555ULL, False/*!mode64*/,
6009 False/*!mode64*/, endness_host);
