Lines Matching defs:env
193 static HReg lookupIRTemp ( ISelEnv* env, IRTemp tmp )
196 vassert(tmp < env->n_vregmap);
197 return env->vregmap[tmp];
200 static void lookupIRTemp64 ( HReg* vrHI, HReg* vrLO, ISelEnv* env, IRTemp tmp )
203 vassert(tmp < env->n_vregmap);
204 vassert(! hregIsInvalid(env->vregmapHI[tmp]));
205 *vrLO = env->vregmap[tmp];
206 *vrHI = env->vregmapHI[tmp];
209 static void addInstr ( ISelEnv* env, X86Instr* instr )
211 addHInstr(env->code, instr);
218 static HReg newVRegI ( ISelEnv* env )
220 HReg reg = mkHReg(True/*virtual reg*/, HRcInt32, 0/*enc*/, env->vreg_ctr);
221 env->vreg_ctr++;
225 static HReg newVRegF ( ISelEnv* env )
227 HReg reg = mkHReg(True/*virtual reg*/, HRcFlt64, 0/*enc*/, env->vreg_ctr);
228 env->vreg_ctr++;
232 static HReg newVRegV ( ISelEnv* env )
234 HReg reg = mkHReg(True/*virtual reg*/, HRcVec128, 0/*enc*/, env->vreg_ctr);
235 env->vreg_ctr++;
250 static X86RMI* iselIntExpr_RMI_wrk ( ISelEnv* env, IRExpr* e );
251 static X86RMI* iselIntExpr_RMI ( ISelEnv* env, IRExpr* e );
253 static X86RI* iselIntExpr_RI_wrk ( ISelEnv* env, IRExpr* e );
254 static X86RI* iselIntExpr_RI ( ISelEnv* env, IRExpr* e );
256 static X86RM* iselIntExpr_RM_wrk ( ISelEnv* env, IRExpr* e );
257 static X86RM* iselIntExpr_RM ( ISelEnv* env, IRExpr* e );
259 static HReg iselIntExpr_R_wrk ( ISelEnv* env, IRExpr* e );
260 static HReg iselIntExpr_R ( ISelEnv* env, IRExpr* e );
262 static X86AMode* iselIntExpr_AMode_wrk ( ISelEnv* env, IRExpr* e );
263 static X86AMode* iselIntExpr_AMode ( ISelEnv* env, IRExpr* e );
266 ISelEnv* env, IRExpr* e );
268 ISelEnv* env, IRExpr* e );
270 static X86CondCode iselCondCode_wrk ( ISelEnv* env, IRExpr* e );
271 static X86CondCode iselCondCode ( ISelEnv* env, IRExpr* e );
273 static HReg iselDblExpr_wrk ( ISelEnv* env, IRExpr* e );
274 static HReg iselDblExpr ( ISelEnv* env, IRExpr* e );
276 static HReg iselFltExpr_wrk ( ISelEnv* env, IRExpr* e );
277 static HReg iselFltExpr ( ISelEnv* env, IRExpr* e );
279 static HReg iselVecExpr_wrk ( ISelEnv* env, IRExpr* e );
280 static HReg iselVecExpr ( ISelEnv* env, IRExpr* e );
308 static void add_to_esp ( ISelEnv* env, Int n )
311 addInstr(env,
315 static void sub_from_esp ( ISelEnv* env, Int n )
318 addInstr(env,
347 static Int pushArg ( ISelEnv* env, IRExpr* arg, HReg r_vecRetAddr )
352 addInstr(env, X86Instr_Push(X86RMI_Reg(r_vecRetAddr)));
356 addInstr(env, X86Instr_Push(X86RMI_Reg(hregX86_EBP())));
360 IRType arg_ty = typeOfIRExpr(env->type_env, arg);
362 addInstr(env, X86Instr_Push(iselIntExpr_RMI(env, arg)));
367 iselInt64Expr(&rHi, &rLo, env, arg);
368 addInstr(env, X86Instr_Push(X86RMI_Reg(rHi)));
369 addInstr(env, X86Instr_Push(X86RMI_Reg(rLo)));
381 void callHelperAndClearArgs ( ISelEnv* env, X86CondCode cc,
390 addInstr(env, X86Instr_Call( cc, (Addr)cee->addr,
393 add_to_esp(env, 4*n_arg_ws);
430 ISelEnv* env,
527 r_vecRetAddr = newVRegI(env);
528 sub_from_esp(env, 16);
529 addInstr(env, mk_iMOVsd_RR( hregX86_ESP(), r_vecRetAddr ));
544 n_arg_ws += pushArg(env, args[i], r_vecRetAddr);
594 vassert(typeOfIRExpr(env->type_env, arg) == Ity_I32);
595 tmpregs[argreg] = iselIntExpr_R(env, arg);
602 addInstr( env, mk_iMOVsd_RR( tmpregs[argregX], argregs[argregX] ) );
614 addInstr(env, X86Instr_Alu32R(Xalu_MOV,
621 vassert(typeOfIRExpr(env->type_env, arg) == Ity_I32);
622 addInstr(env, X86Instr_Alu32R(Xalu_MOV,
623 iselIntExpr_RMI(env, arg),
650 cc = iselCondCode( env, guard );
686 callHelperAndClearArgs( env, cc, cee, n_arg_ws, *retloc );
695 X86AMode* genGuestArrayOffset ( ISelEnv* env, IRRegArray* descr,
724 tmp = newVRegI(env);
725 roff = iselIntExpr_R(env, off);
726 addInstr(env, mk_iMOVsd_RR(roff, tmp));
728 addInstr(env,
731 addInstr(env,
741 void set_FPU_rounding_default ( ISelEnv* env )
748 addInstr(env, X86Instr_Push(X86RMI_Imm(DEFAULT_FPUCW)));
749 addInstr(env, X86Instr_FpLdCW(zero_esp));
750 add_to_esp(env, 4);
760 void set_FPU_rounding_mode ( ISelEnv* env, IRExpr* mode )
762 HReg rrm = iselIntExpr_R(env, mode);
763 HReg rrm2 = newVRegI(env);
774 addInstr(env, mk_iMOVsd_RR(rrm, rrm2));
775 addInstr(env, X86Instr_Alu32R(Xalu_AND, X86RMI_Imm(3), rrm2));
776 addInstr(env, X86Instr_Sh32(Xsh_SHL, 10, rrm2));
777 addInstr(env, X86Instr_Alu32R(Xalu_OR, X86RMI_Imm(DEFAULT_FPUCW), rrm2));
778 addInstr(env, X86Instr_Push(X86RMI_Reg(rrm2)));
779 addInstr(env, X86Instr_FpLdCW(zero_esp));
780 add_to_esp(env, 4);
788 static HReg do_sse_Not128 ( ISelEnv* env, HReg src )
790 HReg dst = newVRegV(env);
793 addInstr(env, X86Instr_SseReRg(Xsse_XOR, dst, dst));
795 addInstr(env, X86Instr_Sse32Fx4(Xsse_CMPEQF, dst, dst));
797 addInstr(env, X86Instr_SseReRg(Xsse_XOR, src, dst));
810 static void roundToF64 ( ISelEnv* env, HReg reg )
813 sub_from_esp(env, 8);
814 addInstr(env, X86Instr_FpLdSt(False/*store*/, 8, reg, zero_esp));
815 addInstr(env, X86Instr_FpLdSt(True/*load*/, 8, reg, zero_esp));
816 add_to_esp(env, 8);
838 static HReg iselIntExpr_R ( ISelEnv* env, IRExpr* e )
840 HReg r = iselIntExpr_R_wrk(env, e);
851 static HReg iselIntExpr_R_wrk ( ISelEnv* env, IRExpr* e )
855 IRType ty = typeOfIRExpr(env->type_env,e);
862 return lookupIRTemp(env, e->Iex.RdTmp.tmp);
867 HReg dst = newVRegI(env);
868 X86AMode* amode = iselIntExpr_AMode ( env, e->Iex.Load.addr );
875 addInstr(env, X86Instr_Alu32R(Xalu_MOV,
880 addInstr(env, X86Instr_LoadEX(2,False,amode,dst));
884 addInstr(env, X86Instr_LoadEX(1,False,amode,dst));
897 HReg junk = newVRegF(env);
898 HReg dst = newVRegI(env);
899 HReg srcL = iselDblExpr(env, triop->arg2);
900 HReg srcR = iselDblExpr(env, triop->arg3);
903 addInstr(env, X86Instr_FpBinary(
910 addInstr(env, X86Instr_FpStSW_AX());
911 addInstr(env, mk_iMOVsd_RR(hregX86_EAX(), dst));
912 addInstr(env, X86Instr_Alu32R(Xalu_AND, X86RMI_Imm(0x4700), dst));
926 HReg dst = newVRegI(env);
927 HReg reg = iselIntExpr_R(env, e->Iex.Binop.arg2);
928 addInstr(env, mk_iMOVsd_RR(reg,dst));
929 addInstr(env, X86Instr_Unary32(Xun_NEG,dst));
953 HReg dst = newVRegI(env);
954 HReg reg = iselIntExpr_R(env, e->Iex.Binop.arg1);
955 X86RMI* rmi = iselIntExpr_RMI(env, e->Iex.Binop.arg2);
956 addInstr(env, mk_iMOVsd_RR(reg,dst));
957 addInstr(env, X86Instr_Alu32R(aluOp, rmi, dst));
990 HReg dst = newVRegI(env);
993 HReg regL = iselIntExpr_R(env, e->Iex.Binop.arg1);
994 addInstr(env, mk_iMOVsd_RR(regL,dst));
999 addInstr(env, X86Instr_Alu32R(
1003 addInstr(env, X86Instr_Alu32R(
1007 addInstr(env, X86Instr_Sh32(Xsh_SHL, 24, dst));
1008 addInstr(env, X86Instr_Sh32(Xsh_SAR, 24, dst));
1011 addInstr(env, X86Instr_Sh32(Xsh_SHL, 16, dst));
1012 addInstr(env, X86Instr_Sh32(Xsh_SAR, 16, dst));
1027 addInstr(env, X86Instr_Sh32( shOp, nshift, dst ));
1030 HReg regR = iselIntExpr_R(env, e->Iex.Binop.arg2);
1031 addInstr(env, mk_iMOVsd_RR(regR,hregX86_ECX()));
1032 addInstr(env, X86Instr_Sh32(shOp, 0/* %cl */, dst));
1040 HReg src1 = iselIntExpr_R(env, e->Iex.Binop.arg1);
1041 HReg dst = newVRegI(env);
1042 HReg src2 = iselIntExpr_R(env, e->Iex.Binop.arg2);
1043 addInstr(env, mk_iMOVsd_RR(src1,dst));
1044 addInstr(env, X86Instr_Alu32R(Xalu_CMP, X86RMI_Reg(src2), dst));
1045 addInstr(env, X86Instr_CMov32(Xcc_B, X86RM_Reg(src2), dst));
1050 HReg hi8 = newVRegI(env);
1051 HReg lo8 = newVRegI(env);
1052 HReg hi8s = iselIntExpr_R(env, e->Iex.Binop.arg1);
1053 HReg lo8s = iselIntExpr_R(env, e->Iex.Binop.arg2);
1054 addInstr(env, mk_iMOVsd_RR(hi8s, hi8));
1055 addInstr(env, mk_iMOVsd_RR(lo8s, lo8));
1056 addInstr(env, X86Instr_Sh32(Xsh_SHL, 8, hi8));
1057 addInstr(env, X86Instr_Alu32R(Xalu_AND, X86RMI_Imm(0xFF), lo8));
1058 addInstr(env, X86Instr_Alu32R(Xalu_OR, X86RMI_Reg(lo8), hi8));
1063 HReg hi16 = newVRegI(env);
1064 HReg lo16 = newVRegI(env);
1065 HReg hi16s = iselIntExpr_R(env, e->Iex.Binop.arg1);
1066 HReg lo16s = iselIntExpr_R(env, e->Iex.Binop.arg2);
1067 addInstr(env, mk_iMOVsd_RR(hi16s, hi16));
1068 addInstr(env, mk_iMOVsd_RR(lo16s, lo16));
1069 addInstr(env, X86Instr_Sh32(Xsh_SHL, 16, hi16));
1070 addInstr(env, X86Instr_Alu32R(Xalu_AND, X86RMI_Imm(0xFFFF), lo16));
1071 addInstr(env, X86Instr_Alu32R(Xalu_OR, X86RMI_Reg(lo16), hi16));
1077 HReg a16 = newVRegI(env);
1078 HReg b16 = newVRegI(env);
1079 HReg a16s = iselIntExpr_R(env, e->Iex.Binop.arg1);
1080 HReg b16s = iselIntExpr_R(env, e->Iex.Binop.arg2);
1088 addInstr(env, mk_iMOVsd_RR(a16s, a16));
1089 addInstr(env, mk_iMOVsd_RR(b16s, b16));
1090 addInstr(env, X86Instr_Sh32(Xsh_SHL, shift, a16));
1091 addInstr(env, X86Instr_Sh32(Xsh_SHL, shift, b16));
1092 addInstr(env, X86Instr_Sh32(shr_op, shift, a16));
1093 addInstr(env, X86Instr_Sh32(shr_op, shift, b16));
1094 addInstr(env, X86Instr_Alu32R(Xalu_MUL, X86RMI_Reg(a16), b16));
1099 HReg fL = iselDblExpr(env, e->Iex.Binop.arg1);
1100 HReg fR = iselDblExpr(env, e->Iex.Binop.arg2);
1101 HReg dst = newVRegI(env);
1102 addInstr(env, X86Instr_FpCmp(fL,fR,dst));
1105 addInstr(env, X86Instr_Sh32(Xsh_SHR, 8, dst));
1112 HReg rf = iselDblExpr(env, e->Iex.Binop.arg2);
1113 HReg dst = newVRegI(env);
1125 sub_from_esp(env, 4);
1128 set_FPU_rounding_mode( env, e->Iex.Binop.arg1 );
1131 addInstr(env, X86Instr_FpLdStI(False/*store*/,
1136 addInstr(env, X86Instr_LoadEX(2,False,zero_esp,dst));
1140 addInstr(env, X86Instr_Alu32R(
1145 set_FPU_rounding_default( env );
1148 add_to_esp(env, 4);
1165 HReg dst = newVRegI(env);
1166 HReg src = iselIntExpr_R(env, expr32);
1167 addInstr(env, mk_iMOVsd_RR(src,dst) );
1168 addInstr(env, X86Instr_Alu32R(Xalu_AND,
1181 HReg dst = newVRegI(env);
1182 X86AMode* amode = iselIntExpr_AMode ( env, mi.bindee[0] );
1183 addInstr(env, X86Instr_LoadEX(1,False,amode,dst));
1195 HReg dst = newVRegI(env);
1196 X86AMode* amode = iselIntExpr_AMode ( env, mi.bindee[0] );
1197 addInstr(env, X86Instr_LoadEX(1,True,amode,dst));
1209 HReg dst = newVRegI(env);
1210 X86AMode* amode = iselIntExpr_AMode ( env, mi.bindee[0] );
1211 addInstr(env, X86Instr_LoadEX(2,False,amode,dst));
1222 dst = newVRegI(env);
1225 addInstr(env, X86Instr_LoadEX(1,False,amode,dst));
1236 dst = newVRegI(env);
1239 addInstr(env, X86Instr_LoadEX(2,False,amode,dst));
1248 HReg dst = newVRegI(env);
1249 HReg src = iselIntExpr_R(env, e->Iex.Unop.arg);
1251 addInstr(env, mk_iMOVsd_RR(src,dst) );
1252 addInstr(env, X86Instr_Alu32R(Xalu_AND,
1259 HReg dst = newVRegI(env);
1260 HReg src = iselIntExpr_R(env, e->Iex.Unop.arg);
1262 addInstr(env, mk_iMOVsd_RR(src,dst) );
1263 addInstr(env, X86Instr_Sh32(Xsh_SHL, amt, dst));
1264 addInstr(env, X86Instr_Sh32(Xsh_SAR, amt, dst));
1270 HReg dst = newVRegI(env);
1271 HReg src = iselIntExpr_R(env, e->Iex.Unop.arg);
1272 addInstr(env, mk_iMOVsd_RR(src,dst) );
1273 addInstr(env, X86Instr_Unary32(Xun_NOT,dst));
1278 iselInt64Expr(&rHi,&rLo, env, e->Iex.Unop.arg);
1283 iselInt64Expr(&rHi,&rLo, env, e->Iex.Unop.arg);
1288 HReg dst = newVRegI(env);
1289 HReg src = iselIntExpr_R(env, e->Iex.Unop.arg);
1291 addInstr(env, mk_iMOVsd_RR(src,dst) );
1292 addInstr(env, X86Instr_Sh32(Xsh_SHR, shift, dst));
1297 HReg dst = newVRegI(env);
1298 X86CondCode cond = iselCondCode(env, e->Iex.Unop.arg);
1299 addInstr(env, X86Instr_Set32(cond,dst));
1306 HReg dst = newVRegI(env);
1307 X86CondCode cond = iselCondCode(env, e->Iex.Unop.arg);
1308 addInstr(env, X86Instr_Set32(cond,dst));
1309 addInstr(env, X86Instr_Sh32(Xsh_SHL, 31, dst));
1310 addInstr(env, X86Instr_Sh32(Xsh_SAR, 31, dst));
1315 HReg dst = newVRegI(env);
1316 HReg src = iselIntExpr_R(env, e->Iex.Unop.arg);
1317 addInstr(env, X86Instr_Bsfr32(True,src,dst));
1324 HReg tmp = newVRegI(env);
1325 HReg dst = newVRegI(env);
1326 HReg src = iselIntExpr_R(env, e->Iex.Unop.arg);
1327 addInstr(env, X86Instr_Bsfr32(False,src,tmp));
1328 addInstr(env, X86Instr_Alu32R(Xalu_MOV,
1330 addInstr(env, X86Instr_Alu32R(Xalu_SUB,
1336 HReg dst = newVRegI(env);
1337 HReg src = iselIntExpr_R(env, e->Iex.Unop.arg);
1338 addInstr(env, mk_iMOVsd_RR(src,dst));
1339 addInstr(env, X86Instr_Unary32(Xun_NEG,dst));
1340 addInstr(env, X86Instr_Alu32R(Xalu_OR,
1342 addInstr(env, X86Instr_Sh32(Xsh_SAR, 31, dst));
1348 HReg dst = newVRegI(env);
1349 HReg src = iselIntExpr_R(env, e->Iex.Unop.arg);
1350 addInstr(env, mk_iMOVsd_RR(src, dst));
1351 addInstr(env, X86Instr_Unary32(Xun_NEG, dst));
1352 addInstr(env, X86Instr_Alu32R(Xalu_OR, X86RMI_Reg(src), dst));
1357 HReg dst = newVRegI(env);
1358 HReg vec = iselVecExpr(env, e->Iex.Unop.arg);
1360 sub_from_esp(env, 16);
1361 addInstr(env, X86Instr_SseLdSt(False/*store*/, vec, esp0));
1362 addInstr(env, X86Instr_Alu32R( Xalu_MOV, X86RMI_Mem(esp0), dst ));
1363 add_to_esp(env, 16);
1372 HReg rf = iselFltExpr(env, e->Iex.Unop.arg);
1373 HReg dst = newVRegI(env);
1376 set_FPU_rounding_default(env);
1378 sub_from_esp(env, 8);
1380 addInstr(env,
1383 addInstr(env,
1386 add_to_esp(env, 8);
1394 return iselIntExpr_R(env, e->Iex.Unop.arg);
1402 env);
1404 iselInt64Expr(&xHi, &xLo, env, e->Iex.Unop.arg);
1405 addInstr(env, X86Instr_Push(X86RMI_Reg(xHi)));
1406 addInstr(env, X86Instr_Push(X86RMI_Reg(xLo)));
1407 addInstr(env, X86Instr_Call( Xcc_ALWAYS, (Addr32)fn,
1409 add_to_esp(env, 2*4);
1410 addInstr(env, mk_iMOVsd_RR(hregX86_EAX(), dst));
1423 HReg dst = newVRegI(env);
1424 addInstr(env, X86Instr_Alu32R(
1432 HReg dst = newVRegI(env);
1433 addInstr(env, X86Instr_LoadEX(
1446 env, e->Iex.GetI.descr,
1448 HReg dst = newVRegI(env);
1450 addInstr(env, X86Instr_LoadEX( 1, False, am, dst ));
1454 addInstr(env, X86Instr_Alu32R(Xalu_MOV, X86RMI_Mem(am), dst));
1462 HReg dst = newVRegI(env);
1474 doHelperCall( &addToSp, &rloc, env, NULL/*guard*/,
1480 addInstr(env, mk_iMOVsd_RR(hregX86_EAX(), dst));
1487 X86RMI* rmi = iselIntExpr_RMI ( env, e );
1488 HReg r = newVRegI(env);
1489 addInstr(env, X86Instr_Alu32R(Xalu_MOV, rmi, r));
1496 && typeOfIRExpr(env->type_env,e->Iex.ITE.cond) == Ity_I1) {
1497 HReg r1 = iselIntExpr_R(env, e->Iex.ITE.iftrue);
1498 X86RM* r0 = iselIntExpr_RM(env, e->Iex.ITE.iffalse);
1499 HReg dst = newVRegI(env);
1500 addInstr(env, mk_iMOVsd_RR(r1,dst));
1501 X86CondCode cc = iselCondCode(env, e->Iex.ITE.cond);
1502 addInstr(env, X86Instr_CMov32(cc ^ 1, r0, dst));
1549 static X86AMode* iselIntExpr_AMode ( ISelEnv* env, IRExpr* e )
1551 X86AMode* am = iselIntExpr_AMode_wrk(env, e);
1557 static X86AMode* iselIntExpr_AMode_wrk ( ISelEnv* env, IRExpr* e )
1559 IRType ty = typeOfIRExpr(env->type_env,e);
1579 HReg r1 = iselIntExpr_R(env, e->Iex.Binop.arg1->Iex.Binop.arg1);
1580 HReg r2 = iselIntExpr_R(env, e->Iex.Binop.arg1
1595 HReg r1 = iselIntExpr_R(env, e->Iex.Binop.arg1);
1596 HReg r2 = iselIntExpr_R(env, e->Iex.Binop.arg2->Iex.Binop.arg1 );
1606 HReg r1 = iselIntExpr_R(env, e->Iex.Binop.arg1);
1613 HReg r1 = iselIntExpr_R(env, e);
1624 static X86RMI* iselIntExpr_RMI ( ISelEnv* env, IRExpr* e )
1626 X86RMI* rmi = iselIntExpr_RMI_wrk(env, e);
1644 static X86RMI* iselIntExpr_RMI_wrk ( ISelEnv* env, IRExpr* e )
1646 IRType ty = typeOfIRExpr(env->type_env,e);
1670 X86AMode* am = iselIntExpr_AMode(env, e->Iex.Load.addr);
1676 HReg r = iselIntExpr_R ( env, e );
1687 static X86RI* iselIntExpr_RI ( ISelEnv* env, IRExpr* e )
1689 X86RI* ri = iselIntExpr_RI_wrk(env, e);
1704 static X86RI* iselIntExpr_RI_wrk ( ISelEnv* env, IRExpr* e )
1706 IRType ty = typeOfIRExpr(env->type_env,e);
1723 HReg r = iselIntExpr_R ( env, e );
1734 static X86RM* iselIntExpr_RM ( ISelEnv* env, IRExpr* e )
1736 X86RM* rm = iselIntExpr_RM_wrk(env, e);
1752 static X86RM* iselIntExpr_RM_wrk ( ISelEnv* env, IRExpr* e )
1754 IRType ty = typeOfIRExpr(env->type_env,e);
1767 HReg r = iselIntExpr_R ( env, e );
1779 static X86CondCode iselCondCode ( ISelEnv* env, IRExpr* e )
1782 return iselCondCode_wrk(env,e);
1786 static X86CondCode iselCondCode_wrk ( ISelEnv* env, IRExpr* e )
1791 vassert(typeOfIRExpr(env->type_env,e) == Ity_I1);
1795 HReg r32 = lookupIRTemp(env, e->Iex.RdTmp.tmp);
1797 addInstr(env, X86Instr_Test32(1,X86RM_Reg(r32)));
1807 r = newVRegI(env);
1808 addInstr(env, X86Instr_Alu32R(Xalu_MOV,X86RMI_Imm(0),r));
1809 addInstr(env, X86Instr_Alu32R(Xalu_XOR,X86RMI_Reg(r),r));
1816 return 1 ^ iselCondCode(env, e->Iex.Unop.arg);
1823 X86RM* rm = iselIntExpr_RM(env, e->Iex.Unop.arg);
1824 addInstr(env, X86Instr_Test32(1,rm));
1833 X86RM* rm = iselIntExpr_RM(env, e->Iex.Unop.arg);
1834 addInstr(env, X86Instr_Test32(0xFF,rm));
1843 X86RM* rm = iselIntExpr_RM(env, e->Iex.Unop.arg);
1844 addInstr(env, X86Instr_Test32(0xFFFF,rm));
1856 HReg r0 = iselIntExpr_R(env, mi.bindee[0]);
1857 X86RMI* rmi1 = iselIntExpr_RMI(env, mi.bindee[1]);
1858 HReg tmp = newVRegI(env);
1859 addInstr(env, mk_iMOVsd_RR(r0, tmp));
1860 addInstr(env, X86Instr_Alu32R(Xalu_AND,rmi1,tmp));
1871 HReg r0 = iselIntExpr_R(env, mi.bindee[0]);
1872 X86RMI* rmi1 = iselIntExpr_RMI(env, mi.bindee[1]);
1873 HReg tmp = newVRegI(env);
1874 addInstr(env, mk_iMOVsd_RR(r0, tmp));
1875 addInstr(env, X86Instr_Alu32R(Xalu_OR,rmi1,tmp));
1886 addInstr(env, X86Instr_Alu32M(Xalu_CMP, X86RI_Imm(0), am));
1893 HReg r1 = iselIntExpr_R(env, e->Iex.Unop.arg);
1895 addInstr(env, X86Instr_Alu32R(Xalu_CMP,rmi2,r1));
1908 HReg tmp = newVRegI(env);
1909 iselInt64Expr( &hi1, &lo1, env, mi.bindee[0] );
1910 addInstr(env, mk_iMOVsd_RR(hi1, tmp));
1911 env, X86Instr_Alu32R(Xalu_OR,X86RMI_Reg(lo1),tmp));
1912 iselInt64Expr( &hi2, &lo2, env, mi.bindee[1] );
1913 addInstr(env, X86Instr_Alu32R(Xalu_OR,X86RMI_Reg(hi2),tmp));
1914 addInstr(env, X86Instr_Alu32R(Xalu_OR,X86RMI_Reg(lo2),tmp));
1923 HReg tmp = newVRegI(env);
1924 iselInt64Expr( &hi, &lo, env, e->Iex.Unop.arg );
1925 addInstr(env, mk_iMOVsd_RR(hi, tmp));
1926 addInstr(env, X86Instr_Alu32R(Xalu_OR,X86RMI_Reg(lo), tmp));
1939 HReg r1 = iselIntExpr_R(env, e->Iex.Binop.arg1);
1940 addInstr(env, X86Instr_Test32(0xFF,X86RM_Reg(r1)));
1947 HReg r1 = iselIntExpr_R(env, e->Iex.Binop.arg1);
1948 X86RMI* rmi2 = iselIntExpr_RMI(env, e->Iex.Binop.arg2);
1949 HReg r = newVRegI(env);
1950 addInstr(env, mk_iMOVsd_RR(r1,r));
1951 addInstr(env, X86Instr_Alu32R(Xalu_XOR,rmi2,r));
1952 addInstr(env, X86Instr_Test32(0xFF,X86RM_Reg(r)));
1968 HReg r1 = iselIntExpr_R(env, e->Iex.Binop.arg1);
1969 X86RMI* rmi2 = iselIntExpr_RMI(env, e->Iex.Binop.arg2);
1970 HReg r = newVRegI(env);
1971 addInstr(env, mk_iMOVsd_RR(r1,r));
1972 addInstr(env, X86Instr_Alu32R(Xalu_XOR,rmi2,r));
1973 addInstr(env, X86Instr_Test32(0xFFFF,X86RM_Reg(r)));
1998 doHelperCall( &addToSp, &rloc, env, NULL/*guard*/,
2005 addInstr(env, X86Instr_Alu32R(Xalu_CMP,
2022 HReg r1 = iselIntExpr_R(env, e->Iex.Binop.arg1);
2023 X86RMI* rmi2 = iselIntExpr_RMI(env, e->Iex.Binop.arg2);
2024 addInstr(env, X86Instr_Alu32R(Xalu_CMP,rmi2,r1));
2042 HReg tHi = newVRegI(env);
2043 HReg tLo = newVRegI(env);
2044 iselInt64Expr( &hi1, &lo1, env, e->Iex.Binop.arg1 );
2045 iselInt64Expr( &hi2, &lo2, env, e->Iex.Binop.arg2 );
2046 addInstr(env, mk_iMOVsd_RR(hi1, tHi));
2047 addInstr(env, X86Instr_Alu32R(Xalu_XOR,X86RMI_Reg(hi2), tHi));
2048 addInstr(env, mk_iMOVsd_RR(lo1, tLo));
2049 addInstr(env, X86Instr_Alu32R(Xalu_XOR,X86RMI_Reg(lo2), tLo));
2050 addInstr(env, X86Instr_Alu32R(Xalu_OR,X86RMI_Reg(tHi), tLo));
2072 static void iselInt64Expr ( HReg* rHi, HReg* rLo, ISelEnv* env, IRExpr* e )
2074 iselInt64Expr_wrk(rHi, rLo, env, e);
2085 static void iselInt64Expr_wrk ( HReg* rHi, HReg* rLo, ISelEnv* env, IRExpr* e )
2090 vassert(typeOfIRExpr(env->type_env,e) == Ity_I64);
2097 HReg tLo = newVRegI(env);
2098 HReg tHi = newVRegI(env);
2102 addInstr(env, X86Instr_Alu32R(Xalu_MOV, X86RMI_Imm(wLo), tLo));
2106 addInstr(env, X86Instr_Alu32R(Xalu_MOV, X86RMI_Imm(wHi), tHi));
2107 addInstr(env, X86Instr_Alu32R(Xalu_MOV, X86RMI_Imm(wLo), tLo));
2116 lookupIRTemp64( rHi, rLo, env, e->Iex.RdTmp.tmp);
2125 tLo = newVRegI(env);
2126 tHi = newVRegI(env);
2127 am0 = iselIntExpr_AMode(env, e->Iex.Load.addr);
2129 addInstr(env, X86Instr_Alu32R( Xalu_MOV, X86RMI_Mem(am0), tLo ));
2130 addInstr(env, X86Instr_Alu32R( Xalu_MOV, X86RMI_Mem(am4), tHi ));
2140 HReg tLo = newVRegI(env);
2141 HReg tHi = newVRegI(env);
2142 addInstr(env, X86Instr_Alu32R( Xalu_MOV, X86RMI_Mem(am), tLo ));
2143 addInstr(env, X86Instr_Alu32R( Xalu_MOV, X86RMI_Mem(am4), tHi ));
2152 = genGuestArrayOffset( env, e->Iex.GetI.descr,
2155 HReg tLo = newVRegI(env);
2156 HReg tHi = newVRegI(env);
2157 addInstr(env, X86Instr_Alu32R( Xalu_MOV, X86RMI_Mem(am), tLo ));
2158 addInstr(env, X86Instr_Alu32R( Xalu_MOV, X86RMI_Mem(am4), tHi ));
2167 HReg tLo = newVRegI(env);
2168 HReg tHi = newVRegI(env);
2169 iselInt64Expr(&e0Hi, &e0Lo, env, e->Iex.ITE.iffalse);
2170 iselInt64Expr(&e1Hi, &e1Lo, env, e->Iex.ITE.iftrue);
2171 addInstr(env, mk_iMOVsd_RR(e1Hi, tHi));
2172 addInstr(env, mk_iMOVsd_RR(e1Lo, tLo));
2173 X86CondCode cc = iselCondCode(env, e->Iex.ITE.cond);
2176 addInstr(env, X86Instr_CMov32(cc ^ 1, X86RM_Reg(e0Hi), tHi));
2177 addInstr(env, X86Instr_CMov32(cc ^ 1, X86RM_Reg(e0Lo), tLo));
2192 HReg tLo = newVRegI(env);
2193 HReg tHi = newVRegI(env);
2195 X86RM* rmLeft = iselIntExpr_RM(env, e->Iex.Binop.arg1);
2196 HReg rRight = iselIntExpr_R(env, e->Iex.Binop.arg2);
2197 addInstr(env, mk_iMOVsd_RR(rRight, hregX86_EAX()));
2198 addInstr(env, X86Instr_MulL(syned, rmLeft));
2200 addInstr(env, mk_iMOVsd_RR(hregX86_EDX(), tHi));
2201 addInstr(env, mk_iMOVsd_RR(hregX86_EAX(), tLo));
2213 HReg tLo = newVRegI(env);
2214 HReg tHi = newVRegI(env);
2216 X86RM* rmRight = iselIntExpr_RM(env, e->Iex.Binop.arg2);
2217 iselInt64Expr(&sHi,&sLo, env, e->Iex.Binop.arg1);
2218 addInstr(env, mk_iMOVsd_RR(sHi, hregX86_EDX()));
2219 addInstr(env, mk_iMOVsd_RR(sLo, hregX86_EAX()));
2220 addInstr(env, X86Instr_Div(syned, rmRight));
2221 addInstr(env, mk_iMOVsd_RR(hregX86_EDX(), tHi));
2222 addInstr(env, mk_iMOVsd_RR(hregX86_EAX(), tLo));
2233 HReg tLo = newVRegI(env);
2234 HReg tHi = newVRegI(env);
2238 iselInt64Expr(&xHi, &xLo, env, e->Iex.Binop.arg1);
2239 iselInt64Expr(&yHi, &yLo, env, e->Iex.Binop.arg2);
2240 addInstr(env, mk_iMOVsd_RR(xHi, tHi));
2241 addInstr(env, X86Instr_Alu32R(op, X86RMI_Reg(yHi), tHi));
2242 addInstr(env, mk_iMOVsd_RR(xLo, tLo));
2243 addInstr(env, X86Instr_Alu32R(op, X86RMI_Reg(yLo), tLo));
2256 HReg tLo = newVRegI(env);
2257 HReg tHi = newVRegI(env);
2260 iselInt64Expr(&xHi, &xLo, env, e->Iex.Binop.arg1);
2261 addInstr(env, mk_iMOVsd_RR(xHi, tHi));
2262 addInstr(env, mk_iMOVsd_RR(xLo, tLo));
2263 addInstr(env, X86Instr_Alu32R(Xalu_ADD, X86RMI_Imm(wLo), tLo));
2264 addInstr(env, X86Instr_Alu32R(Xalu_ADC, X86RMI_Imm(wHi), tHi));
2272 HReg tLo = newVRegI(env);
2273 HReg tHi = newVRegI(env);
2274 iselInt64Expr(&xHi, &xLo, env, e->Iex.Binop.arg1);
2275 addInstr(env, mk_iMOVsd_RR(xHi, tHi));
2276 addInstr(env, mk_iMOVsd_RR(xLo, tLo));
2277 iselInt64Expr(&yHi, &yLo, env, e->Iex.Binop.arg2);
2279 addInstr(env, X86Instr_Alu32R(Xalu_ADD, X86RMI_Reg(yLo), tLo));
2280 addInstr(env, X86Instr_Alu32R(Xalu_ADC, X86RMI_Reg(yHi), tHi));
2282 addInstr(env, X86Instr_Alu32R(Xalu_SUB, X86RMI_Reg(yLo), tLo));
2283 addInstr(env, X86Instr_Alu32R(Xalu_SBB, X86RMI_Reg(yHi), tHi));
2292 *rHi = iselIntExpr_R(env, e->Iex.Binop.arg1);
2293 *rLo = iselIntExpr_R(env, e->Iex.Binop.arg2);
2318 tLo = newVRegI(env);
2319 tHi = newVRegI(env);
2320 tTemp = newVRegI(env);
2321 rAmt = iselIntExpr_R(env, e->Iex.Binop.arg2);
2322 iselInt64Expr(&sHi,&sLo, env, e->Iex.Binop.arg1);
2323 addInstr(env, mk_iMOVsd_RR(rAmt, hregX86_ECX()));
2324 addInstr(env, mk_iMOVsd_RR(sHi, tHi));
2325 addInstr(env, mk_iMOVsd_RR(sLo, tLo));
2328 addInstr(env, X86Instr_Sh3232(Xsh_SHL, 0/*%cl*/, tLo, tHi));
2329 env, X86Instr_Sh32(Xsh_SHL, 0/*%cl*/, tLo));
2330 addInstr(env, X86Instr_Test32(32, X86RM_Reg(hregX86_ECX())));
2331 addInstr(env, X86Instr_CMov32(Xcc_NZ, X86RM_Reg(tLo), tHi));
2332 addInstr(env, X86Instr_Alu32R(Xalu_MOV, X86RMI_Imm(0), tTemp));
2333 addInstr(env, X86Instr_CMov32(Xcc_NZ, X86RM_Reg(tTemp), tLo));
2360 tLo = newVRegI(env);
2361 tHi = newVRegI(env);
2362 tTemp = newVRegI(env);
2363 rAmt = iselIntExpr_R(env, e->Iex.Binop.arg2);
2364 iselInt64Expr(&sHi,&sLo, env, e->Iex.Binop.arg1);
2365 addInstr(env, mk_iMOVsd_RR(rAmt, hregX86_ECX()));
2366 addInstr(env, mk_iMOVsd_RR(sHi, tHi));
2367 addInstr(env, mk_iMOVsd_RR(sLo, tLo));
2370 addInstr(env, X86Instr_Sh3232(Xsh_SHR, 0/*%cl*/, tHi, tLo));
2371 addInstr(env, X86Instr_Sh32(Xsh_SHR, 0/*%cl*/, tHi));
2372 addInstr(env, X86Instr_Test32(32, X86RM_Reg(hregX86_ECX())));
2373 addInstr(env, X86Instr_CMov32(Xcc_NZ, X86RM_Reg(tHi), tLo));
2374 addInstr(env, X86Instr_Alu32R(Xalu_MOV, X86RMI_Imm(0), tTemp));
2375 addInstr(env, X86Instr_CMov32(Xcc_NZ, X86RM_Reg(tTemp), tHi));
2386 HReg rf = iselDblExpr(env, e->Iex.Binop.arg2);
2387 HReg tLo = newVRegI(env);
2388 HReg tHi = newVRegI(env);
2404 sub_from_esp(env, 8);
2407 set_FPU_rounding_mode( env, e->Iex.Binop.arg1 );
2410 addInstr(env, X86Instr_FpLdStI(False/*store*/, 8, rf, zero_esp));
2414 addInstr(env, X86Instr_Alu32R(
2416 addInstr(env, X86Instr_Alu32R(
2420 set_FPU_rounding_default( env );
2423 add_to_esp(env, 8);
2536 HReg tLo = newVRegI(env);
2537 HReg tHi = newVRegI(env);
2538 iselInt64Expr(&yHi, &yLo, env, e->Iex.Binop.arg2);
2539 addInstr(env, X86Instr_Push(X86RMI_Reg(yHi)));
2540 addInstr(env, X86Instr_Push(X86RMI_Reg(yLo)));
2541 iselInt64Expr(&xHi, &xLo, env, e->Iex.Binop.arg1);
2542 addInstr(env, X86Instr_Push(X86RMI_Reg(xHi)));
2543 addInstr(env, X86Instr_Push(X86RMI_Reg(xLo)));
2544 addInstr(env, X86Instr_Call( Xcc_ALWAYS, (Addr32)fn,
2546 add_to_esp(env, 4*4);
2547 addInstr(env, mk_iMOVsd_RR(hregX86_EDX(), tHi));
2548 addInstr(env, mk_iMOVsd_RR(hregX86_EAX(), tLo));
2577 HReg tLo = newVRegI(env);
2578 HReg tHi = newVRegI(env);
2579 X86RMI* y = iselIntExpr_RMI(env, e->Iex.Binop.arg2);
2580 addInstr(env, X86Instr_Push(y));
2581 iselInt64Expr(&xHi, &xLo, env, e->Iex.Binop.arg1);
2582 addInstr(env, X86Instr_Push(X86RMI_Reg(xHi)));
2583 addInstr(env, X86Instr_Push(X86RMI_Reg(xLo)));
2584 addInstr(env, X86Instr_Call( Xcc_ALWAYS, (Addr32)fn,
2586 add_to_esp(env, 3*4);
2587 addInstr(env, mk_iMOVsd_RR(hregX86_EDX(), tHi));
2588 addInstr(env, mk_iMOVsd_RR(hregX86_EAX(), tLo));
2606 HReg tLo = newVRegI(env);
2607 HReg tHi = newVRegI(env);
2608 HReg src = iselIntExpr_R(env, e->Iex.Unop.arg);
2609 addInstr(env, mk_iMOVsd_RR(src,tHi));
2610 addInstr(env, mk_iMOVsd_RR(src,tLo));
2611 addInstr(env, X86Instr_Sh32(Xsh_SAR, 31, tHi));
2619 HReg tLo = newVRegI(env);
2620 HReg tHi = newVRegI(env);
2621 HReg src = iselIntExpr_R(env, e->Iex.Unop.arg);
2622 addInstr(env, mk_iMOVsd_RR(src,tLo));
2623 addInstr(env, X86Instr_Alu32R(Xalu_MOV, X86RMI_Imm(0), tHi));
2631 HReg tLo = newVRegI(env);
2632 HReg tHi = newVRegI(env);
2633 HReg src = iselIntExpr_R(env, e->Iex.Unop.arg);
2634 addInstr(env, mk_iMOVsd_RR(src,tLo));
2635 addInstr(env, X86Instr_Alu32R(Xalu_AND,
2637 addInstr(env, X86Instr_Alu32R(Xalu_MOV, X86RMI_Imm(0), tHi));
2647 HReg tLo = newVRegI(env);
2648 HReg tHi = newVRegI(env);
2649 HReg vec = iselVecExpr(env, e->Iex.Unop.arg);
2653 sub_from_esp(env, 16);
2654 addInstr(env, X86Instr_SseLdSt(False/*store*/, vec, esp0));
2655 addInstr(env, X86Instr_Alu32R( Xalu_MOV,
2657 addInstr(env, X86Instr_Alu32R( Xalu_MOV,
2659 add_to_esp(env, 16);
2667 HReg tLo = newVRegI(env);
2668 HReg tHi = newVRegI(env);
2669 X86CondCode cond = iselCondCode(env, e->Iex.Unop.arg);
2670 addInstr(env, X86Instr_Set32(cond,tLo));
2671 addInstr(env, X86Instr_Sh32(Xsh_SHL, 31, tLo));
2672 addInstr(env, X86Instr_Sh32(Xsh_SAR, 31, tLo));
2673 addInstr(env, mk_iMOVsd_RR(tLo, tHi));
2681 HReg tLo = newVRegI(env);
2682 HReg tHi = newVRegI(env);
2684 iselInt64Expr(&sHi, &sLo, env, e->Iex.Unop.arg);
2685 addInstr(env, mk_iMOVsd_RR(sHi, tHi));
2686 addInstr(env, mk_iMOVsd_RR(sLo, tLo));
2687 addInstr(env, X86Instr_Unary32(Xun_NOT,tHi));
2688 addInstr(env, X86Instr_Unary32(Xun_NOT,tLo));
2697 HReg tLo = newVRegI(env);
2698 HReg tHi = newVRegI(env);
2700 iselInt64Expr(&yHi, &yLo, env, e->Iex.Unop.arg);
2702 addInstr(env, X86Instr_Alu32R(Xalu_MOV, X86RMI_Imm(0), tLo));
2703 addInstr(env, X86Instr_Alu32R(Xalu_SUB, X86RMI_Reg(yLo), tLo));
2705 addInstr(env, X86Instr_Alu32R(Xalu_MOV, X86RMI_Imm(0), tHi));
2706 addInstr(env, X86Instr_Alu32R(Xalu_SBB, X86RMI_Reg(yHi), tHi));
2710 addInstr(env, X86Instr_Alu32R(Xalu_OR, X86RMI_Reg(yLo), tLo));
2711 addInstr(env, X86Instr_Alu32R(Xalu_OR, X86RMI_Reg(yHi), tHi));
2728 HReg xBoth = newVRegI(env);
2729 HReg merged = newVRegI(env);
2730 HReg tmp2 = newVRegI(env);
2732 iselInt64Expr(&xHi,&xLo, env, mi.bindee[0]);
2733 env, mk_iMOVsd_RR(xHi,xBoth));
2734 addInstr(env, X86Instr_Alu32R(Xalu_OR,
2737 iselInt64Expr(&yHi,&yLo, env, mi.bindee[1]);
2738 addInstr(env, mk_iMOVsd_RR(yHi,merged));
2739 addInstr(env, X86Instr_Alu32R(Xalu_OR,
2741 addInstr(env, X86Instr_Alu32R(Xalu_OR,
2745 addInstr(env, mk_iMOVsd_RR(merged,tmp2));
2746 addInstr(env, X86Instr_Unary32(Xun_NEG,tmp2));
2747 addInstr(env, X86Instr_Alu32R(Xalu_OR,
2749 addInstr(env, X86Instr_Sh32(Xsh_SAR, 31, tmp2));
2756 HReg tmp1 = newVRegI(env);
2757 HReg tmp2 = newVRegI(env);
2759 iselInt64Expr(&srcHi, &srcLo, env, e->Iex.Unop.arg);
2761 addInstr(env, mk_iMOVsd_RR(srcHi,tmp1));
2762 addInstr(env, X86Instr_Alu32R(Xalu_OR,
2765 addInstr(env, mk_iMOVsd_RR(tmp1,tmp2));
2766 addInstr(env, X86Instr_Unary32(Xun_NEG,tmp2));
2767 addInstr(env, X86Instr_Alu32R(Xalu_OR,
2769 addInstr(env, X86Instr_Sh32(Xsh_SAR, 31, tmp2));
2780 HReg rf = iselDblExpr(env, e->Iex.Unop.arg);
2781 HReg tLo = newVRegI(env);
2782 HReg tHi = newVRegI(env);
2786 set_FPU_rounding_default(env);
2788 sub_from_esp(env, 8);
2790 addInstr(env,
2793 addInstr(env,
2796 addInstr(env,
2799 add_to_esp(env, 8);
2818 HReg tLo = newVRegI(env);
2819 HReg tHi = newVRegI(env);
2820 iselInt64Expr(&xHi, &xLo, env, e->Iex.Unop.arg);
2821 addInstr(env, X86Instr_Push(X86RMI_Reg(xHi)));
2822 addInstr(env, X86Instr_Push(X86RMI_Reg(xLo)));
2823 addInstr(env, X86Instr_Call( Xcc_ALWAYS, (Addr32)fn,
2825 add_to_esp(env, 2*4);
2826 addInstr(env, mk_iMOVsd_RR(hregX86_EDX(), tHi));
2827 addInstr(env, mk_iMOVsd_RR(hregX86_EAX(), tLo));
2841 HReg tLo = newVRegI(env);
2842 HReg tHi = newVRegI(env);
2847 doHelperCall( &addToSp, &rloc, env, NULL/*guard*/,
2855 addInstr(env, mk_iMOVsd_RR(hregX86_EDX(), tHi));
2856 addInstr(env, mk_iMOVsd_RR(hregX86_EAX(), tLo));
2874 static HReg iselFltExpr ( ISelEnv* env, IRExpr* e )
2876 HReg r = iselFltExpr_wrk( env, e );
2886 static HReg iselFltExpr_wrk ( ISelEnv* env, IRExpr* e )
2888 IRType ty = typeOfIRExpr(env->type_env,e);
2892 return lookupIRTemp(env, e->Iex.RdTmp.tmp);
2897 HReg res = newVRegF(env);
2899 am = iselIntExpr_AMode(env, e->Iex.Load.addr);
2900 addInstr(env, X86Instr_FpLdSt(True/*load*/, 4, res, am));
2909 HReg dst = newVRegF(env);
2910 HReg src = iselDblExpr(env, e->Iex.Binop.arg2);
2911 set_FPU_rounding_mode( env, e->Iex.Binop.arg1 );
2912 addInstr(env, X86Instr_Fp64to32(src,dst));
2913 set_FPU_rounding_default( env );
2920 HReg res = newVRegF(env);
2921 addInstr(env, X86Instr_FpLdSt( True/*load*/, 4, res, am ));
2929 HReg dst = newVRegF(env);
2930 X86RMI* rmi = iselIntExpr_RMI(env, e->Iex.Unop.arg);
2932 addInstr(env, X86Instr_Push(rmi));
2933 addInstr(env, X86Instr_FpLdSt(
2936 add_to_esp(env, 4);
2941 HReg rf = iselFltExpr(env, e->Iex.Binop.arg2);
2942 HReg dst = newVRegF(env);
2948 set_FPU_rounding_mode( env, e->Iex.Binop.arg1 );
2951 addInstr(env, X86Instr_FpUnary(Xfp_ROUND, rf, dst));
2954 set_FPU_rounding_default( env );
2991 static HReg iselDblExpr ( ISelEnv* env, IRExpr* e )
2993 HReg r = iselDblExpr_wrk( env, e );
3003 static HReg iselDblExpr_wrk ( ISelEnv* env, IRExpr* e )
3005 IRType ty = typeOfIRExpr(env->type_env,e);
3010 return lookupIRTemp(env, e->Iex.RdTmp.tmp);
3015 HReg freg = newVRegF(env);
3030 addInstr(env, X86Instr_Push(X86RMI_Imm(u.u32x2[1])));
3031 addInstr(env, X86Instr_Push(X86RMI_Imm(u.u32x2[0])));
3032 addInstr(env, X86Instr_FpLdSt(True/*load*/, 8, freg,
3034 add_to_esp(env, 8);
3040 HReg res = newVRegF(env);
3042 am = iselIntExpr_AMode(env, e->Iex.Load.addr);
3043 addInstr(env, X86Instr_FpLdSt(True/*load*/, 8, res, am));
3050 HReg res = newVRegF(env);
3051 addInstr(env, X86Instr_FpLdSt( True/*load*/, 8, res, am ));
3058 env, e->Iex.GetI.descr,
3060 HReg res = newVRegF(env);
3061 addInstr(env, X86Instr_FpLdSt( True/*load*/, 8, res, am ));
3082 HReg res = newVRegF(env);
3083 HReg srcL = iselDblExpr(env, triop->arg2);
3084 HReg srcR = iselDblExpr(env, triop->arg3);
3087 addInstr(env, X86Instr_FpBinary(fpop,srcL,srcR,res));
3090 roundToF64(env, res);
3096 HReg rf = iselDblExpr(env, e->Iex.Binop.arg2);
3097 HReg dst = newVRegF(env);
3103 set_FPU_rounding_mode( env, e->Iex.Binop.arg1 );
3106 addInstr(env, X86Instr_FpUnary(Xfp_ROUND, rf, dst));
3109 set_FPU_rounding_default( env );
3115 HReg dst = newVRegF(env);
3117 iselInt64Expr( &rHi, &rLo, env, e->Iex.Binop.arg2);
3118 addInstr(env, X86Instr_Push(X86RMI_Reg(rHi)));
3119 addInstr(env, X86Instr_Push(X86RMI_Reg(rLo)));
3122 set_FPU_rounding_mode( env, e->Iex.Binop.arg1 );
3124 addInstr(env, X86Instr_FpLdStI(
3129 set_FPU_rounding_default( env );
3131 add_to_esp(env, 8);
3146 HReg res = newVRegF(env);
3147 HReg src = iselDblExpr(env, e->Iex.Binop.arg2);
3155 addInstr(env, X86Instr_FpUnary(fpop,src,res));
3158 roundToF64(env, res);
3171 HReg res = newVRegF(env);
3172 HReg src = iselDblExpr(env, e->Iex.Unop.arg);
3173 addInstr(env, X86Instr_FpUnary(fpop,src,res));
3174 /* No need to do roundToF64(env,res) for Xfp_NEG or Xfp_ABS,
3183 HReg dst = newVRegF(env);
3184 HReg ri = iselIntExpr_R(env, e->Iex.Unop.arg);
3185 addInstr(env, X86Instr_Push(X86RMI_Reg(ri)));
3186 set_FPU_rounding_default(env);
3187 addInstr(env, X86Instr_FpLdStI(
3190 add_to_esp(env, 4);
3196 HReg dst = newVRegF(env);
3198 iselInt64Expr( &rHi, &rLo, env, e->Iex.Unop.arg);
3200 set_FPU_rounding_default(env);
3201 addInstr(env, X86Instr_Push(X86RMI_Reg(rHi)));
3202 addInstr(env, X86Instr_Push(X86RMI_Reg(rLo)));
3203 addInstr(env, X86Instr_FpLdSt(
3206 add_to_esp(env, 8);
3211 HReg res = iselFltExpr(env, e->Iex.Unop.arg);
3222 && typeOfIRExpr(env->type_env,e->Iex.ITE.cond) == Ity_I1) {
3223 HReg r1 = iselDblExpr(env, e->Iex.ITE.iftrue);
3224 HReg r0 = iselDblExpr(env, e->Iex.ITE.iffalse);
3225 HReg dst = newVRegF(env);
3226 addInstr(env, X86Instr_FpUnary(Xfp_MOV,r1,dst));
3227 X86CondCode cc = iselCondCode(env, e->Iex.ITE.cond);
3228 addInstr(env, X86Instr_FpCMov(cc ^ 1, r0, dst));
3242 static HReg iselVecExpr ( ISelEnv* env, IRExpr* e )
3244 HReg r = iselVecExpr_wrk( env, e );
3255 static HReg iselVecExpr_wrk ( ISelEnv* env, IRExpr* e )
3259 do { if (env->hwcaps == 0/*baseline, no sse*/ \
3260 || env->hwcaps == VEX_HWCAPS_X86_MMXEXT /*Integer SSE*/) \
3265 do { if (0 == (env->hwcaps & VEX_HWCAPS_X86_SSE2)) \
3270 (env->hwcaps & VEX_HWCAPS_X86_SSE2)
3276 IRType ty = typeOfIRExpr(env->type_env,e);
3283 return lookupIRTemp(env, e->Iex.RdTmp.tmp);
3287 HReg dst = newVRegV(env);
3288 addInstr(env, X86Instr_SseLdSt(
3298 HReg dst = newVRegV(env);
3299 X86AMode* am = iselIntExpr_AMode(env, e->Iex.Load.addr);
3300 addInstr(env, X86Instr_SseLdSt( True/*load*/, dst, am ));
3305 HReg dst = newVRegV(env);
3307 addInstr(env, X86Instr_SseConst(e->Iex.Const.con->Ico.V128, dst));
3320 X86AMode* am = iselIntExpr_AMode(env, mi.bindee[0]);
3321 HReg dst = newVRegV(env);
3322 addInstr(env, X86Instr_SseLdzLO(8, dst, am));
3330 HReg arg = iselVecExpr(env, e->Iex.Unop.arg);
3331 return do_sse_Not128(env, arg);
3350 HReg arg = iselVecExpr(env, e->Iex.Unop.arg);
3351 HReg tmp = newVRegV(env);
3352 HReg dst = newVRegV(env);
3354 addInstr(env, X86Instr_SseReRg(Xsse_XOR, tmp, tmp));
3355 addInstr(env, X86Instr_SseReRg(Xsse_CMPEQ32, arg, tmp));
3356 tmp = do_sse_Not128(env, tmp);
3357 addInstr(env, X86Instr_SseShuf(0xB1, tmp, dst));
3358 addInstr(env, X86Instr_SseReRg(Xsse_OR, tmp, dst));
3373 HReg arg = iselVecExpr(env, e->Iex.Unop.arg);
3374 HReg dst = newVRegV(env);
3375 HReg r32 = newVRegI(env);
3376 sub_from_esp(env, 16);
3377 addInstr(env, X86Instr_SseLdSt(False/*store*/, arg, esp0));
3380 addInstr(env, X86Instr_Alu32R(Xalu_MOV, X86RMI_Mem(am), r32));
3381 addInstr(env, X86Instr_Unary32(Xun_NEG, r32));
3382 addInstr(env, X86Instr_Alu32R(Xalu_SBB, X86RMI_Reg(r32), r32));
3383 addInstr(env, X86Instr_Alu32M(Xalu_MOV, X86RI_Reg(r32), am));
3385 addInstr(env, X86Instr_SseLdSt(True/*load*/, dst, esp0));
3386 add_to_esp(env, 16);
3394 HReg vec0 = newVRegV(env);
3395 HReg vec1 = newVRegV(env);
3396 HReg dst = newVRegV(env);
3401 addInstr(env, X86Instr_SseReRg(Xsse_XOR, vec0, vec0));
3402 addInstr(env, mk_vMOVsd_RR(vec0, vec1));
3403 addInstr(env, X86Instr_Sse32Fx4(Xsse_CMPEQF, vec1, vec1));
3406 arg = iselVecExpr(env, e->Iex.Unop.arg);
3408 addInstr(env, mk_vMOVsd_RR(arg, dst));
3410 addInstr(env, X86Instr_SseReRg(cmpOp, vec0, dst));
3412 addInstr(env, X86Instr_SseReRg(Xsse_XOR, vec1, dst));
3420 HReg arg = iselVecExpr(env, e->Iex.Unop.arg);
3421 HReg dst = newVRegV(env);
3422 addInstr(env, X86Instr_Sse32Fx4(op, arg, dst));
3437 HReg arg = iselVecExpr(env, e->Iex.Unop.arg);
3438 HReg dst = newVRegV(env);
3439 addInstr(env, mk_vMOVsd_RR(arg, dst));
3440 addInstr(env, X86Instr_Sse32FLo(op, arg, dst));
3453 HReg arg = iselVecExpr(env, e->Iex.Unop.arg);
3454 HReg dst = newVRegV(env);
3456 addInstr(env, mk_vMOVsd_RR(arg, dst));
3457 addInstr(env, X86Instr_Sse64FLo(op, arg, dst));
3462 HReg dst = newVRegV(env);
3464 X86RMI* rmi = iselIntExpr_RMI(env, e->Iex.Unop.arg);
3465 addInstr(env, X86Instr_Push(rmi));
3466 addInstr(env, X86Instr_SseLdzLO(4, dst, esp0));
3467 add_to_esp(env, 4);
3473 HReg dst = newVRegV(env);
3475 iselInt64Expr(&rHi, &rLo, env, e->Iex.Unop.arg);
3476 addInstr(env, X86Instr_Push(X86RMI_Reg(rHi)));
3477 addInstr(env, X86Instr_Push(X86RMI_Reg(rLo)));
3478 addInstr(env, X86Instr_SseLdzLO(8, dst, esp0));
3479 add_to_esp(env, 8);
3496 HReg arg = iselVecExpr(env, e->Iex.Binop.arg2);
3497 HReg dst = newVRegV(env);
3500 addInstr(env, (e->Iex.Binop.op == Iop_Sqrt64Fx2
3507 HReg dst = newVRegV(env);
3508 HReg srcV = iselVecExpr(env, e->Iex.Binop.arg1);
3509 HReg srcI = iselIntExpr_R(env, e->Iex.Binop.arg2);
3511 sub_from_esp(env, 16);
3512 addInstr(env, X86Instr_SseLdSt(False/*store*/, srcV, esp0));
3513 addInstr(env, X86Instr_Alu32M(Xalu_MOV, X86RI_Reg(srcI), esp0));
3514 addInstr(env, X86Instr_SseLdSt(True/*load*/, dst, esp0));
3515 add_to_esp(env, 16);
3520 HReg dst = newVRegV(env);
3521 HReg srcV = iselVecExpr(env, e->Iex.Binop.arg1);
3525 iselInt64Expr(&srcIhi, &srcIlo, env, e->Iex.Binop.arg2);
3526 sub_from_esp(env, 16);
3527 addInstr(env, X86Instr_SseLdSt(False/*store*/, srcV, esp0));
3528 addInstr(env, X86Instr_Alu32M(Xalu_MOV, X86RI_Reg(srcIlo), esp0));
3529 addInstr(env, X86Instr_Alu32M(Xalu_MOV, X86RI_Reg(srcIhi), esp4));
3530 addInstr(env, X86Instr_SseLdSt(True/*load*/, dst, esp0));
3531 add_to_esp(env, 16);
3541 HReg dst = newVRegV(env);
3543 sub_from_esp(env, 16);
3545 iselInt64Expr(&r1, &r0, env, e->Iex.Binop.arg2);
3546 addInstr(env, X86Instr_Alu32M(Xalu_MOV, X86RI_Reg(r0), esp0));
3547 addInstr(env, X86Instr_Alu32M(Xalu_MOV, X86RI_Reg(r1), esp4));
3549 iselInt64Expr(&r3, &r2, env, e->Iex.Binop.arg1);
3550 addInstr(env, X86Instr_Alu32M(Xalu_MOV, X86RI_Reg(r2), esp8));
3551 addInstr(env, X86Instr_Alu32M(Xalu_MOV, X86RI_Reg(r3), esp12));
3553 addInstr(env, X86Instr_SseLdSt(True/*load*/, dst, esp0));
3554 add_to_esp(env, 16);
3566 HReg argL = iselVecExpr(env, e->Iex.Binop.arg1);
3567 HReg argR = iselVecExpr(env, e->Iex.Binop.arg2);
3568 HReg dst = newVRegV(env);
3569 addInstr(env, mk_vMOVsd_RR(argL, dst));
3570 addInstr(env, X86Instr_Sse32Fx4(op, argR, dst));
3582 HReg argL = iselVecExpr(env, e->Iex.Binop.arg1);
3583 HReg argR = iselVecExpr(env, e->Iex.Binop.arg2);
3584 HReg dst = newVRegV(env);
3586 addInstr(env, mk_vMOVsd_RR(argL, dst));
3587 addInstr(env, X86Instr_Sse64Fx2(op, argR, dst));
3602 HReg argL = iselVecExpr(env, e->Iex.Binop.arg1);
3603 HReg argR = iselVecExpr(env, e->Iex.Binop.arg2);
3604 HReg dst = newVRegV(env);
3605 addInstr(env, mk_vMOVsd_RR(argL, dst));
3606 addInstr(env, X86Instr_Sse32FLo(op, argR, dst));
3621 HReg argL = iselVecExpr(env, e->Iex.Binop.arg1);
3622 HReg argR = iselVecExpr(env, e->Iex.Binop.arg2);
3623 HReg dst = newVRegV(env);
3625 addInstr(env, mk_vMOVsd_RR(argL, dst));
3626 addInstr(env, X86Instr_Sse64FLo(op, argR, dst));
3690 HReg arg1 = iselVecExpr(env, e->Iex.Binop.arg1);
3691 HReg arg2 = iselVecExpr(env, e->Iex.Binop.arg2);
3692 HReg dst = newVRegV(env);
3696 addInstr(env, mk_vMOVsd_RR(arg2, dst));
3697 addInstr(env, X86Instr_SseReRg(op, arg1, dst));
3699 addInstr(env, mk_vMOVsd_RR(arg1, dst));
3700 addInstr(env, X86Instr_SseReRg(op, arg2, dst));
3714 HReg greg = iselVecExpr(env, e->Iex.Binop.arg1);
3715 X86RMI* rmi = iselIntExpr_RMI(env, e->Iex.Binop.arg2);
3717 HReg ereg = newVRegV(env);
3718 HReg dst = newVRegV(env);
3720 addInstr(env, X86Instr_Push(X86RMI_Imm(0)));
3721 addInstr(env, X86Instr_Push(X86RMI_Imm(0)));
3722 addInstr(env, X86Instr_Push(X86RMI_Imm(0)));
3723 addInstr(env, X86Instr_Push(rmi));
3724 addInstr(env, X86Instr_SseLdSt(True/*load*/, ereg, esp0));
3725 addInstr(env, mk_vMOVsd_RR(greg, dst));
3726 addInstr(env, X86Instr_SseReRg(op, ereg, dst));
3727 add_to_esp(env, 16);
3741 HReg dst = newVRegV(env);
3742 HReg argL = iselVecExpr(env, e->Iex.Binop.arg1);
3743 HReg argR = iselVecExpr(env, e->Iex.Binop.arg2);
3744 HReg argp = newVRegI(env);
3746 sub_from_esp(env, 112);
3748 addInstr(env, X86Instr_Lea32(X86AMode_IR(48, hregX86_ESP()),
3751 addInstr(env, X86Instr_Alu32R(Xalu_AND,
3759 addInstr(env, X86Instr_Lea32(X86AMode_IR(0, argp),
3761 addInstr(env, X86Instr_Lea32(X86AMode_IR(16, argp),
3763 addInstr(env, X86Instr_Lea32(X86AMode_IR(32, argp),
3769 addInstr(env, X86Instr_SseLdSt(False/*!isLoad*/, argL,
3771 addInstr(env, X86Instr_SseLdSt(False/*!isLoad*/, argR,
3774 addInstr(env, X86Instr_Call( Xcc_ALWAYS, (Addr32)fn,
3778 addInstr(env, X86Instr_SseLdSt(True/*isLoad*/, dst,
3781 add_to_esp(env, 112);
3801 HReg argL = iselVecExpr(env, triop->arg2);
3802 HReg argR = iselVecExpr(env, triop->arg3);
3803 HReg dst = newVRegV(env);
3804 addInstr(env, mk_vMOVsd_RR(argL, dst));
3807 addInstr(env, X86Instr_Sse32Fx4(op, argR, dst));
3817 HReg argL = iselVecExpr(env, triop->arg2);
3818 HReg argR = iselVecExpr(env, triop->arg3);
3819 HReg dst = newVRegV(env);
3821 addInstr(env, mk_vMOVsd_RR(argL, dst));
3824 addInstr(env, X86Instr_Sse64Fx2(op, argR, dst));
3835 HReg r1 = iselVecExpr(env, e->Iex.ITE.iftrue);
3836 HReg r0 = iselVecExpr(env, e->Iex.ITE.iffalse);
3837 HReg dst = newVRegV(env);
3838 addInstr(env, mk_vMOVsd_RR(r1,dst));
3839 X86CondCode cc = iselCondCode(env, e->Iex.ITE.cond);
3840 addInstr(env, X86Instr_SseCMov(cc ^ 1, r0, dst));
3846 LibVEX_ppVexHwCaps(VexArchX86,env->hwcaps));
3860 static void iselStmt ( ISelEnv* env, IRStmt* stmt )
3872 IRType tya = typeOfIRExpr(env->type_env, stmt->Ist.Store.addr);
3873 IRType tyd = typeOfIRExpr(env->type_env, stmt->Ist.Store.data);
3880 X86AMode* am = iselIntExpr_AMode(env, stmt->Ist.Store.addr);
3881 X86RI* ri = iselIntExpr_RI(env, stmt->Ist.Store.data);
3882 addInstr(env, X86Instr_Alu32M(Xalu_MOV,ri,am));
3886 X86AMode* am = iselIntExpr_AMode(env, stmt->Ist.Store.addr);
3887 HReg r = iselIntExpr_R(env, stmt->Ist.Store.data);
3888 addInstr(env, X86Instr_Store( toUChar(tyd==Ity_I8 ? 1 : 2),
3893 X86AMode* am = iselIntExpr_AMode(env, stmt->Ist.Store.addr);
3894 HReg r = iselDblExpr(env, stmt->Ist.Store.data);
3895 addInstr(env, X86Instr_FpLdSt(False/*store*/, 8, r, am));
3899 X86AMode* am = iselIntExpr_AMode(env, stmt->Ist.Store.addr);
3900 HReg r = iselFltExpr(env, stmt->Ist.Store.data);
3901 addInstr(env, X86Instr_FpLdSt(False/*store*/, 4, r, am));
3906 iselInt64Expr(&vHi, &vLo, env, stmt->Ist.Store.data);
3907 rA = iselIntExpr_R(env, stmt->Ist.Store.addr);
3908 addInstr(env, X86Instr_Alu32M(
3910 addInstr(env, X86Instr_Alu32M(
3915 X86AMode* am = iselIntExpr_AMode(env, stmt->Ist.Store.addr);
3916 HReg r = iselVecExpr(env, stmt->Ist.Store.data);
3917 addInstr(env, X86Instr_SseLdSt(False/*store*/, r, am));
3925 IRType ty = typeOfIRExpr(env->type_env, stmt->Ist.Put.data);
3929 X86RI* ri = iselIntExpr_RI(env, stmt->Ist.Put.data);
3930 addInstr(env,
3939 HReg r = iselIntExpr_R(env, stmt->Ist.Put.data);
3940 addInstr(env, X86Instr_Store(
3951 iselInt64Expr(&vHi, &vLo, env, stmt->Ist.Put.data);
3952 addInstr(env, X86Instr_Alu32M( Xalu_MOV, X86RI_Reg(vLo), am ));
3953 addInstr(env, X86Instr_Alu32M( Xalu_MOV, X86RI_Reg(vHi), am4 ));
3957 HReg vec = iselVecExpr(env, stmt->Ist.Put.data);
3959 addInstr(env, X86Instr_SseLdSt(False/*store*/, vec, am));
3963 HReg f32 = iselFltExpr(env, stmt->Ist.Put.data);
3965 set_FPU_rounding_default(env); /* paranoia */
3966 addInstr(env, X86Instr_FpLdSt( False/*store*/, 4, f32, am ));
3970 HReg f64 = iselDblExpr(env, stmt->Ist.Put.data);
3972 set_FPU_rounding_default(env); /* paranoia */
3973 addInstr(env, X86Instr_FpLdSt( False/*store*/, 8, f64, am ));
3985 env, puti->descr,
3988 IRType ty = typeOfIRExpr(env->type_env, puti->data);
3990 HReg val = iselDblExpr(env, puti->data);
3991 addInstr(env, X86Instr_FpLdSt( False/*store*/, 8, val, am ));
3995 HReg r = iselIntExpr_R(env, puti->data);
3996 addInstr(env, X86Instr_Store( 1, r, am ));
4000 HReg r = iselIntExpr_R(env, puti->data);
4001 addInstr(env, X86Instr_Alu32M( Xalu_MOV, X86RI_Reg(r), am ));
4007 iselInt64Expr(&rHi, &rLo, env, puti->data);
4008 addInstr(env, X86Instr_Alu32M( Xalu_MOV, X86RI_Reg(rLo), am ));
4009 addInstr(env, X86Instr_Alu32M( Xalu_MOV, X86RI_Reg(rHi), am4 ));
4018 IRType ty = typeOfIRTemp(env->type_env, tmp);
4029 X86AMode* am = iselIntExpr_AMode(env, stmt->Ist.WrTmp.data);
4030 HReg dst = lookupIRTemp(env, tmp);
4036 addInstr(env, X86Instr_Alu32R(Xalu_MOV, X86RMI_Reg(src), dst));
4038 addInstr(env, X86Instr_Lea32(am,dst));
4044 X86RMI* rmi = iselIntExpr_RMI(env, stmt->Ist.WrTmp.data);
4045 HReg dst = lookupIRTemp(env, tmp);
4046 addInstr(env, X86Instr_Alu32R(Xalu_MOV,rmi,dst));
4051 iselInt64Expr(&rHi,&rLo, env, stmt->Ist.WrTmp.data);
4052 lookupIRTemp64( &dstHi, &dstLo, env, tmp);
4053 addInstr(env, mk_iMOVsd_RR(rHi,dstHi) );
4054 addInstr(env, mk_iMOVsd_RR(rLo,dstLo) );
4058 X86CondCode cond = iselCondCode(env, stmt->Ist.WrTmp.data);
4059 HReg dst = lookupIRTemp(env, tmp);
4060 addInstr(env, X86Instr_Set32(cond, dst));
4064 HReg dst = lookupIRTemp(env, tmp);
4065 HReg src = iselDblExpr(env, stmt->Ist.WrTmp.data);
4066 addInstr(env, X86Instr_FpUnary(Xfp_MOV,src,dst));
4070 HReg dst = lookupIRTemp(env, tmp);
4071 HReg src = iselFltExpr(env, stmt->Ist.WrTmp.data);
4072 addInstr(env, X86Instr_FpUnary(Xfp_MOV,src,dst));
4076 HReg dst = lookupIRTemp(env, tmp);
4077 HReg src = iselVecExpr(env, stmt->Ist.WrTmp.data);
4078 addInstr(env, mk_vMOVsd_RR(src,dst));
4091 retty = typeOfIRTemp(env->type_env, d->tmp);
4110 doHelperCall( &addToSp, &rloc, env, d->guard, d->cee, retty, d->args );
4127 HReg dst = lookupIRTemp(env, d->tmp);
4128 addInstr(env, mk_iMOVsd_RR(hregX86_EAX(),dst) );
4137 lookupIRTemp64( &dstHi, &dstLo, env, d->tmp);
4138 addInstr(env, mk_iMOVsd_RR(hregX86_EDX(),dstHi) );
4139 addInstr(env, mk_iMOVsd_RR(hregX86_EAX(),dstLo) );
4149 HReg dst = lookupIRTemp(env, d->tmp);
4151 addInstr(env, X86Instr_SseLdSt( True/*load*/, dst, am ));
4152 add_to_esp(env, addToSp);
4166 addInstr(env, X86Instr_MFence(env->hwcaps));
4179 IRType ty = typeOfIRExpr(env->type_env, cas->dataLo);
4181 X86AMode* am = iselIntExpr_AMode(env, cas->addr);
4182 HReg rDataLo = iselIntExpr_R(env, cas->dataLo);
4183 HReg rExpdLo = iselIntExpr_R(env, cas->expdLo);
4184 HReg rOldLo = lookupIRTemp(env, cas->oldLo);
4187 addInstr(env, mk_iMOVsd_RR(rExpdLo, rOldLo));
4188 addInstr(env, mk_iMOVsd_RR(rExpdLo, hregX86_EAX()));
4189 addInstr(env, mk_iMOVsd_RR(rDataLo, hregX86_EBX()));
4196 addInstr(env, X86Instr_ACAS(am, sz));
4197 addInstr(env,
4204 IRType ty = typeOfIRExpr(env->type_env, cas->dataLo);
4208 X86AMode* am = iselIntExpr_AMode(env, cas->addr);
4209 HReg rDataHi = iselIntExpr_R(env, cas->dataHi);
4210 HReg rDataLo = iselIntExpr_R(env, cas->dataLo);
4211 HReg rExpdHi = iselIntExpr_R(env, cas->expdHi);
4212 HReg rExpdLo = iselIntExpr_R(env, cas->expdLo);
4213 HReg rOldHi = lookupIRTemp(env, cas->oldHi);
4214 HReg rOldLo = lookupIRTemp(env, cas->oldLo);
4217 addInstr(env, mk_iMOVsd_RR(rExpdHi, rOldHi));
4218 addInstr(env, mk_iMOVsd_RR(rExpdLo, rOldLo));
4219 addInstr(env, mk_iMOVsd_RR(rExpdHi, hregX86_EDX()));
4220 addInstr(env, mk_iMOVsd_RR(rExpdLo, hregX86_EAX()));
4221 addInstr(env, mk_iMOVsd_RR(rDataHi, hregX86_ECX()));
4222 addInstr(env, mk_iMOVsd_RR(rDataLo, hregX86_EBX()));
4223 addInstr(env, X86Instr_DACAS(am));
4224 addInstr(env,
4227 addInstr(env,
4250 X86CondCode cc = iselCondCode(env, stmt->Ist.Exit.guard);
4256 if (env->chainingAllowed) {
4261 = ((Addr32)stmt->Ist.Exit.dst->Ico.U32) > env->max_ga;
4263 addInstr(env, X86Instr_XDirect(stmt->Ist.Exit.dst->Ico.U32,
4269 HReg r = iselIntExpr_R(env, IRExpr_Const(stmt->Ist.Exit.dst));
4270 addInstr(env, X86Instr_XAssisted(r, amEIP, cc, Ijk_Boring));
4293 HReg r = iselIntExpr_R(env, IRExpr_Const(stmt->Ist.Exit.dst));
4294 addInstr(env, X86Instr_XAssisted(r, amEIP, cc, stmt->Ist.Exit.jk));
4317 static void iselNext ( ISelEnv* env,
4335 if (env->chainingAllowed) {
4340 = ((Addr32)cdst->Ico.U32) > env->max_ga;
4342 addInstr(env, X86Instr_XDirect(cdst->Ico.U32,
4349 HReg r = iselIntExpr_R(env, next);
4350 addInstr(env, X86Instr_XAssisted(r, amEIP, Xcc_ALWAYS,
4360 HReg r = iselIntExpr_R(env, next);
4362 if (env->chainingAllowed) {
4363 addInstr(env, X86Instr_XIndir(r, amEIP, Xcc_ALWAYS));
4365 addInstr(env, X86Instr_XAssisted(r, amEIP, Xcc_ALWAYS,
4392 HReg r = iselIntExpr_R(env, next);
4394 addInstr(env, X86Instr_XAssisted(r, amEIP, Xcc_ALWAYS, jk));
4428 ISelEnv* env;
4445 env = LibVEX_Alloc_inline(sizeof(ISelEnv));
4446 env->vreg_ctr = 0;
4449 env->code = newHInstrArray();
4451 /* Copy BB's type env. */
4452 env->type_env = bb->tyenv;
4456 env->n_vregmap = bb->tyenv->types_used;
4457 env->vregmap = LibVEX_Alloc_inline(env->n_vregmap * sizeof(HReg));
4458 env->vregmapHI = LibVEX_Alloc_inline(env->n_vregmap * sizeof(HReg));
4461 env->chainingAllowed = chainingAllowed;
4462 env->hwcaps = hwcaps_host;
4463 env->max_ga = max_ga;
4468 for (i = 0; i < env->n_vregmap; i++) {
4483 env->vregmap[i] = hreg;
4484 env->vregmapHI[i] = hregHI;
4486 env->vreg_ctr = j;
4491 addInstr(env, X86Instr_EvCheck(amCounter, amFailAddr));
4498 addInstr(env, X86Instr_ProfInc());
4503 iselStmt(env, bb->stmts[i]);
4505 iselNext(env, bb->next, bb->jumpkind, bb->offsIP);
4508 env->code->n_vregs = env->vreg_ctr;
4509 return env->code;
