Lines Matching full:sets
74 int sets;
119 /* The offsets are only correct because all per-instruction event sets get
158 for (i = 0; i < c->sets * c->assoc; i++)
161 for (i = 0; i < c->sets * c->assoc; i++) {
183 c->sets = (c->size / c->line_size) / c->assoc;
184 c->sets_min_1 = c->sets - 1;
186 c->tag_shift = c->line_size_bits + VG_(log2)(c->sets);
204 sizeof(UWord) * c->sets * c->assoc);
219 for (i = 0, set = 0; set < c->sets; set++) {
310 VG_(tool_panic)("item straddles more than two cache sets");
404 /* Nb: this is a fast way of doing ((set1+1) % c->sets) */
416 VG_(printf)("addr: %lx size: %u sets: %d %d", a, size, set1, set2);
417 VG_(tool_panic)("item straddles more than two cache sets");
612 sizeof(line_use) * c->sets * c->assoc);
614 sizeof(line_loaded) * c->sets * c->assoc);
697 CLG_DEBUG(6,"%s.Acc(Addr %#lx, size %d): Sets [%d/%d]\n", \
749 /* Nb: this is a fast way of doing ((set1+1) % L.sets) */ \
827 VG_(printf)("addr: %#lx size: %u sets: %d %d", a, size, set1, set2); \
828 VG_(tool_panic)("item straddles more than two cache sets"); \
997 for (i = 0; i < I1.sets * I1.assoc; i++)
1002 for (i = 0; i < D1.sets * D1.assoc; i++)
1007 for (i = 0; i < LL.sets * LL.assoc; i++)
1523 D_total = CLG_(get_eventset_cost)( CLG_(sets).full );
1524 CLG_(init_cost)( CLG_(sets).full, D_total);
1596 struct event_sets CLG_(sets);
1600 // Event groups from which the event sets are composed
1634 CLG_(sets).base = CLG_(get_event_set2)(EG_USE, EG_IR);
1637 CLG_(sets).full = CLG_(add_event_group2)(CLG_(sets).base, EG_DR, EG_DW);
1638 CLG_(sets).full = CLG_(add_event_group2)(CLG_(sets).full, EG_BC, EG_BI);
1639 CLG_(sets).full = CLG_(add_event_group) (CLG_(sets).full, EG_BUS);
1640 CLG_(sets).full = CLG_(add_event_group2)(CLG_(sets).full, EG_ALLOC, EG_SYS);
1644 CLG_(print_eventset)(-2, CLG_(sets).base);
1645 CLG_(print_eventset)(-2, CLG_(sets).full);
1649 CLG_(dumpmap) = CLG_(get_eventmapping)(CLG_(sets).full);
1686 CLG_(add_and_zero_cost2)( CLG_(sets).full, cost,
