Lines Matching full:vbits64
1230 ULong vbits64 = V_BITS64_UNDEFINED;
1237 vbits64 <<= 8;
1238 vbits64 |= vbits8;
1243 res[long_index] = vbits64;
1346 ULong vbits64 = V_BITS64_UNDEFINED; /* result */
1360 the least. The vbits to return are calculated into vbits64.
1369 vbits64 <<= 8;
1370 vbits64 |= vbits8;
1379 return vbits64;
1385 return vbits64;
1418 value for vbits64 and return the combined result, but don't
1424 vbits64 UifU= pessim64 (is pessimised by it, iow) */
1425 vbits64 |= pessim64;
1426 return vbits64;
1438 vbits64 UifU= pessim64 (is pessimised by it, iow) */
1439 vbits64 |= pessim64;
1442 vbits64 |= (((ULong)V_BITS32_UNDEFINED) << 32);
1443 return vbits64;
1450 return vbits64;
4403 void mc_STOREV64 ( Addr a, ULong vbits64, Bool isBigEndian )
4410 mc_STOREVn_slow( a, 64, vbits64, isBigEndian );
4418 mc_STOREVn_slow( a, 64, vbits64, isBigEndian );
4428 if (LIKELY(V_BITS64_DEFINED == vbits64)) {
4437 mc_STOREVn_slow( a, 64, vbits64, isBigEndian );
4440 if (V_BITS64_UNDEFINED == vbits64) {
4449 mc_STOREVn_slow( a, 64, vbits64, isBigEndian );
4454 mc_STOREVn_slow( a, 64, vbits64, isBigEndian );
4459 VG_REGPARM(1) void MC_(helperc_STOREV64be) ( Addr a, ULong vbits64 )
4461 mc_STOREV64(a, vbits64, True);
4463 VG_REGPARM(1) void MC_(helperc_STOREV64le) ( Addr a, ULong vbits64 )
4465 mc_STOREV64(a, vbits64, False);
