Lines Matching full:ppc
17 * test-ppc.c:
18 * PPC tests for qemu-PPC CPU emulation checks
107 * All ppc instructions are 32bits wide, which makes this fairly easy.
312 /* -------------- BEGIN #include "test-ppc.h" -------------- */
314 * test-ppc.h:
315 * PPC tests for qemu-PPC CPU emulation checks - definitions
394 /* -------------- END #include "test-ppc.h" -------------- */
455 /* -------------- BEGIN #include "ops-ppc.c" -------------- */
457 /* #include "test-ppc.h" */
3927 "PPC integer arith insns with two args",
3932 "PPC integer arith insns with two args with flags update",
3937 "PPC integer arith insns with two args and carry",
3942 "PPC integer arith insns with two args and carry with flags update",
3947 "PPC integer logical insns with two args",
3952 "PPC integer logical insns with two args with flags update",
3957 "PPC integer compare insns (two args)",
3962 "PPC integer compare with immediate insns (two args)",
3967 "PPC integer arith insns\n with one register + one 16 bits immediate args",
3972 "PPC integer arith insns\n with one register + one 16 bits immediate args with flags update",
3977 "PPC integer logical insns\n with one register + one 16 bits immediate args",
3982 "PPC integer logical insns\n with one register + one 16 bits immediate args with flags update",
3987 "PPC condition register logical insns - two operands",
3992 "PPC integer arith insns with one arg and carry",
3997 "PPC integer arith insns with one arg and carry with flags update",
4002 "PPC integer logical insns with one arg",
4007 "PPC integer logical insns with one arg with flags update",
4012 "PPC logical insns with special forms",
4017 "PPC logical insns with special forms with flags update",
4022 "PPC integer load insns\n with one register + one 16 bits immediate args with flags update",
4027 "PPC integer load insns with two register args",
4032 "PPC integer store insns\n with one register + one 16 bits immediate args with flags update",
4037 "PPC integer store insns with three register args",
4042 "PPC integer population count with one register args, no flags",
4048 "PPC floating point arith insns with three args",
4055 "PPC floating point arith insns\n with three args with flags update",
4062 "PPC floating point arith insns with two args",
4069 "PPC floating point arith insns\n with two args with flags update",
4076 "PPC floating point compare insns (two args)",
4083 "PPC floating point arith insns with one arg",
4090 "PPC floating point arith insns\n with one arg with flags update",
4097 "PPC floating point status register manipulation insns",
4104 "PPC floating point status register manipulation insns\n with flags update",
4111 "PPC float load insns\n with one register + one 16 bits immediate args with flags update",
4118 "PPC float load insns with two register args",
4125 "PPC float store insns\n with one register + one 16 bits immediate args with flags update",
4132 "PPC float store insns with three register args",
4139 "PPC altivec integer arith insns with three args",
4146 "PPC altivec integer logical insns with three args",
4153 "PPC altivec integer arith insns with two args",
4160 "PPC altivec integer logical insns with two args",
4167 "PPC altivec integer logical insns with one arg",
4256 "PPC 405 mac insns with three args",
4263 "PPC 405 mac insns with three args with flags update",
4270 /* -------------- END #include "ops-ppc.c" -------------- */
7532 "PPC floating point instructions tests "
