Lines Matching refs:srcStep
64 VLD1 dRow0, [pSrc], srcStep
65 VLD1 dRow1, [pSrc], srcStep
66 VLD1 dRow2, [pSrc], srcStep
67 VLD1 dRow3, [pSrc], srcStep
68 VLD1 dRow4, [pSrc], srcStep
69 VLD1 dRow5, [pSrc], srcStep
70 VLD1 dRow6, [pSrc], srcStep
71 VLD1 dRow7, [pSrc], srcStep
111 VLD1 {dRow0, dRow0Shft}, [pSrc], srcStep
113 VLD1 {dRow1, dRow1Shft}, [pSrc], srcStep
115 VLD1 {dRow2, dRow2Shft}, [pSrc], srcStep
117 VLD1 {dRow3, dRow3Shft}, [pSrc], srcStep
119 VLD1 {dRow4, dRow4Shft}, [pSrc], srcStep
121 VLD1 {dRow5, dRow5Shft}, [pSrc], srcStep
123 VLD1 {dRow6, dRow6Shft}, [pSrc], srcStep
125 VLD1 {dRow7, dRow7Shft}, [pSrc], srcStep
172 VLD1 dRow0, [pSrc], srcStep
173 VLD1 dRow1, [pSrc], srcStep
174 VLD1 dRow2, [pSrc], srcStep
175 VLD1 dRow3, [pSrc], srcStep
176 VLD1 dRow4, [pSrc], srcStep
177 VLD1 dRow5, [pSrc], srcStep
178 VLD1 dRow6, [pSrc], srcStep
179 VLD1 dRow7, [pSrc], srcStep
181 VLD1 dRow8, [pSrc], srcStep
205 ;// 1. VLD1 {dRow0, dRow0Shft}, [pSrc], srcStep ;// Load the row and next 8 bytes
233 VLD1 {dRow0, dRow0Shft}, [pSrc], srcStep
235 VLD1 {dRow1, dRow1Shft}, [pSrc], srcStep
237 VLD1 {dRow2, dRow2Shft}, [pSrc], srcStep
239 VLD1 {dRow3, dRow3Shft}, [pSrc], srcStep
241 VLD1 {dRow4, dRow4Shft}, [pSrc], srcStep
243 VLD1 {dRow5, dRow5Shft}, [pSrc], srcStep
245 VLD1 {dRow6, dRow6Shft}, [pSrc], srcStep
247 VLD1 {dRow7, dRow7Shft}, [pSrc], srcStep
249 VLD1 {dRow8, dRow8Shft}, [pSrc], srcStep
295 srcStep RN 1
