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79 discussion on the subject. The focus is on the ARM CPU architecture.</p>
301 <p>The cache behavior becomes relevant to this discussion when each CPU core has
464 <p>Going back to the cache discussion, assume A and B are on separate cache
836 <p>As usual, it?s useful to illuminate the discussion with an example. We?re
1717 but the discussion is illuminating.)</em></p>
1824 <dd>An introduction to multi-threaded programming in C++ and Java, by Hans Boehm. Excellent discussion of data races and basic synchronization methods.
1852 <dd>A discussion of ARM SMP issues, illuminated with short snippets of ARM code. If you found the examples in this document too un-specific, or want to read the formal description of the DMB instruction, read this. Also describes the instructions used for memory barriers on executable code (possibly useful if you?re generating code on the fly).
1869 <dd>The ?first known correct solution to the mutual exclusion problem in concurrent programming?. The wikipedia article has the full algorithm, with a discussion about how it would need to be updated to work with modern optimizing compilers and SMP hardware.