1 //===-- llvm/MC/MCTargetAsmParser.h - Target Assembly Parser ----*- C++ -*-===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 10 #ifndef LLVM_MC_MCTARGETASMPARSER_H 11 #define LLVM_MC_MCTARGETASMPARSER_H 12 13 #include "llvm/MC/MCExpr.h" 14 #include "llvm/MC/MCParser/MCAsmParserExtension.h" 15 #include "llvm/MC/MCTargetOptions.h" 16 #include <memory> 17 18 namespace llvm { 19 class AsmToken; 20 class MCInst; 21 class MCParsedAsmOperand; 22 class MCStreamer; 23 class SMLoc; 24 class StringRef; 25 template <typename T> class SmallVectorImpl; 26 27 typedef SmallVectorImpl<std::unique_ptr<MCParsedAsmOperand>> OperandVector; 28 29 enum AsmRewriteKind { 30 AOK_Delete = 0, // Rewrite should be ignored. 31 AOK_Align, // Rewrite align as .align. 32 AOK_DotOperator, // Rewrite a dot operator expression as an immediate. 33 // E.g., [eax].foo.bar -> [eax].8 34 AOK_Emit, // Rewrite _emit as .byte. 35 AOK_Imm, // Rewrite as $$N. 36 AOK_ImmPrefix, // Add $$ before a parsed Imm. 37 AOK_Input, // Rewrite in terms of $N. 38 AOK_Output, // Rewrite in terms of $N. 39 AOK_SizeDirective, // Add a sizing directive (e.g., dword ptr). 40 AOK_Label, // Rewrite local labels. 41 AOK_Skip // Skip emission (e.g., offset/type operators). 42 }; 43 44 const char AsmRewritePrecedence [] = { 45 0, // AOK_Delete 46 2, // AOK_Align 47 2, // AOK_DotOperator 48 2, // AOK_Emit 49 4, // AOK_Imm 50 4, // AOK_ImmPrefix 51 3, // AOK_Input 52 3, // AOK_Output 53 5, // AOK_SizeDirective 54 1, // AOK_Label 55 2 // AOK_Skip 56 }; 57 58 struct AsmRewrite { 59 AsmRewriteKind Kind; 60 SMLoc Loc; 61 unsigned Len; 62 unsigned Val; 63 StringRef Label; 64 public: 65 AsmRewrite(AsmRewriteKind kind, SMLoc loc, unsigned len = 0, unsigned val = 0) 66 : Kind(kind), Loc(loc), Len(len), Val(val) {} 67 AsmRewrite(AsmRewriteKind kind, SMLoc loc, unsigned len, StringRef label) 68 : Kind(kind), Loc(loc), Len(len), Val(0), Label(label) {} 69 }; 70 71 struct ParseInstructionInfo { 72 73 SmallVectorImpl<AsmRewrite> *AsmRewrites; 74 75 ParseInstructionInfo() : AsmRewrites(nullptr) {} 76 ParseInstructionInfo(SmallVectorImpl<AsmRewrite> *rewrites) 77 : AsmRewrites(rewrites) {} 78 }; 79 80 /// MCTargetAsmParser - Generic interface to target specific assembly parsers. 81 class MCTargetAsmParser : public MCAsmParserExtension { 82 public: 83 enum MatchResultTy { 84 Match_InvalidOperand, 85 Match_MissingFeature, 86 Match_MnemonicFail, 87 Match_Success, 88 FIRST_TARGET_MATCH_RESULT_TY 89 }; 90 91 private: 92 MCTargetAsmParser(const MCTargetAsmParser &) = delete; 93 void operator=(const MCTargetAsmParser &) = delete; 94 protected: // Can only create subclasses. 95 MCTargetAsmParser(); 96 97 /// AvailableFeatures - The current set of available features. 98 uint64_t AvailableFeatures; 99 100 /// ParsingInlineAsm - Are we parsing ms-style inline assembly? 101 bool ParsingInlineAsm; 102 103 /// SemaCallback - The Sema callback implementation. Must be set when parsing 104 /// ms-style inline assembly. 105 MCAsmParserSemaCallback *SemaCallback; 106 107 /// Set of options which affects instrumentation of inline assembly. 108 MCTargetOptions MCOptions; 109 110 public: 111 ~MCTargetAsmParser() override; 112 113 uint64_t getAvailableFeatures() const { return AvailableFeatures; } 114 void setAvailableFeatures(uint64_t Value) { AvailableFeatures = Value; } 115 116 bool isParsingInlineAsm () { return ParsingInlineAsm; } 117 void setParsingInlineAsm (bool Value) { ParsingInlineAsm = Value; } 118 119 MCTargetOptions getTargetOptions() const { return MCOptions; } 120 121 void setSemaCallback(MCAsmParserSemaCallback *Callback) { 122 SemaCallback = Callback; 123 } 124 125 virtual bool ParseRegister(unsigned &RegNo, SMLoc &StartLoc, 126 SMLoc &EndLoc) = 0; 127 128 /// Sets frame register corresponding to the current MachineFunction. 129 virtual void SetFrameRegister(unsigned RegNo) {} 130 131 /// ParseInstruction - Parse one assembly instruction. 132 /// 133 /// The parser is positioned following the instruction name. The target 134 /// specific instruction parser should parse the entire instruction and 135 /// construct the appropriate MCInst, or emit an error. On success, the entire 136 /// line should be parsed up to and including the end-of-statement token. On 137 /// failure, the parser is not required to read to the end of the line. 138 // 139 /// \param Name - The instruction name. 140 /// \param NameLoc - The source location of the name. 141 /// \param Operands [out] - The list of parsed operands, this returns 142 /// ownership of them to the caller. 143 /// \return True on failure. 144 virtual bool ParseInstruction(ParseInstructionInfo &Info, StringRef Name, 145 SMLoc NameLoc, OperandVector &Operands) = 0; 146 147 /// ParseDirective - Parse a target specific assembler directive 148 /// 149 /// The parser is positioned following the directive name. The target 150 /// specific directive parser should parse the entire directive doing or 151 /// recording any target specific work, or return true and do nothing if the 152 /// directive is not target specific. If the directive is specific for 153 /// the target, the entire line is parsed up to and including the 154 /// end-of-statement token and false is returned. 155 /// 156 /// \param DirectiveID - the identifier token of the directive. 157 virtual bool ParseDirective(AsmToken DirectiveID) = 0; 158 159 /// mnemonicIsValid - This returns true if this is a valid mnemonic and false 160 /// otherwise. 161 virtual bool mnemonicIsValid(StringRef Mnemonic, unsigned VariantID) = 0; 162 163 /// MatchAndEmitInstruction - Recognize a series of operands of a parsed 164 /// instruction as an actual MCInst and emit it to the specified MCStreamer. 165 /// This returns false on success and returns true on failure to match. 166 /// 167 /// On failure, the target parser is responsible for emitting a diagnostic 168 /// explaining the match failure. 169 virtual bool MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode, 170 OperandVector &Operands, MCStreamer &Out, 171 uint64_t &ErrorInfo, 172 bool MatchingInlineAsm) = 0; 173 174 /// Allows targets to let registers opt out of clobber lists. 175 virtual bool OmitRegisterFromClobberLists(unsigned RegNo) { return false; } 176 177 /// Allow a target to add special case operand matching for things that 178 /// tblgen doesn't/can't handle effectively. For example, literal 179 /// immediates on ARM. TableGen expects a token operand, but the parser 180 /// will recognize them as immediates. 181 virtual unsigned validateTargetOperandClass(MCParsedAsmOperand &Op, 182 unsigned Kind) { 183 return Match_InvalidOperand; 184 } 185 186 /// checkTargetMatchPredicate - Validate the instruction match against 187 /// any complex target predicates not expressible via match classes. 188 virtual unsigned checkTargetMatchPredicate(MCInst &Inst) { 189 return Match_Success; 190 } 191 192 virtual void convertToMapAndConstraints(unsigned Kind, 193 const OperandVector &Operands) = 0; 194 195 virtual const MCExpr *applyModifierToExpr(const MCExpr *E, 196 MCSymbolRefExpr::VariantKind, 197 MCContext &Ctx) { 198 return nullptr; 199 } 200 201 virtual void onLabelParsed(MCSymbol *Symbol) { }; 202 }; 203 204 } // End llvm namespace 205 206 #endif 207
