| /external/llvm/examples/OCaml-Kaleidoscope/Chapter2/ |
| token.ml | 9 | Def | Extern
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| /external/llvm/examples/OCaml-Kaleidoscope/Chapter3/ |
| token.ml | 9 | Def | Extern
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| /external/llvm/examples/OCaml-Kaleidoscope/Chapter4/ |
| token.ml | 9 | Def | Extern
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| /external/llvm/examples/OCaml-Kaleidoscope/Chapter5/ |
| token.ml | 9 | Def | Extern
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| /external/llvm/examples/OCaml-Kaleidoscope/Chapter6/ |
| token.ml | 9 | Def | Extern
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| /external/llvm/examples/OCaml-Kaleidoscope/Chapter7/ |
| token.ml | 9 | Def | Extern
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| /external/llvm/lib/Analysis/ |
| MemDepPrinter.cpp | 29 Def,
67 return InstTypePair(dep.getInst(), Def);
91 = {"Clobber", "Def", "NonFuncLocal", "Unknown"};
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| /external/llvm/lib/Target/R600/ |
| SIFixSGPRLiveRanges.cpp | 14 /// The main case we need to handle is when a def is used in one side of a
17 /// %def
27 /// inside of the IF to the same register as %def. In traditional live
28 /// interval analysis %def is not live inside the IF branch, however, since
31 /// value of %def, so the use in ELSE will see the wrong value.
35 /// %def
45 /// Adding this use will make the def live thoughout the IF branch, which is
121 unsigned Def = MO.getReg();
122 if (TargetRegisterInfo::isVirtualRegister(Def)) {
123 if (TRI->isSGPRClass(MRI.getRegClass(Def)))
[all...] |
| SIFixSGPRCopies.cpp | 169 MachineInstr *Def = MRI.getVRegDef(Reg);
170 if (Def->getOpcode() != AMDGPU::COPY) {
174 return inferRegClassFromDef(TRI, MRI, Def->getOperand(1).getReg(),
175 Def->getOperand(1).getSubReg());
256 // sgpr0 = def;
258 // sgpr1 = def;
265 // sgpr2 = def;
267 // sgpr2 = def;
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| SIShrinkInstructions.cpp | 154 MachineInstr *Def = MRI.getUniqueVRegDef(Reg);
155 if (Def && Def->isMoveImmediate()) {
156 MachineOperand &MovSrc = Def->getOperand(1);
165 Def->eraseFromParent();
|
| SITypeRewriter.cpp | 121 InsertElementInst *Def = cast<InsertElementInst>(Arg);
122 Args.push_back(Def->getOperand(1));
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| /external/llvm/lib/CodeGen/ |
| LiveInterval.cpp | 62 VNInfo *createDeadDef(SlotIndex Def, VNInfo::Allocator &VNInfoAllocator) {
63 assert(!Def.isDead() && "Cannot define a value at the dead slot");
65 iterator I = impl().find(Def);
67 VNInfo *VNI = LR->getNextValue(Def, VNInfoAllocator);
68 impl().insertAtEnd(Segment(Def, Def.getDeadSlot(), VNI));
73 if (SlotIndex::isSameInstr(Def, S->start)) {
74 assert(S->valno->def == S->start && "Inconsistent existing value def");
81 Def = std::min(Def, S->start)
[all...] |
| MachineCopyPropagation.cpp | 114 static bool isNopCopy(MachineInstr *CopyMI, unsigned Def, unsigned Src,
117 if (Def == SrcSrc)
119 if (TRI->isSubRegister(SrcSrc, Def)) {
121 unsigned SubIdx = TRI->getSubRegIndex(SrcSrc, Def);
132 // maintain imp-use/imp-def chains.
139 DenseMap<unsigned, MachineInstr*> AvailCopyMap; // Def -> available copies map
140 DenseMap<unsigned, MachineInstr*> CopyMap; // Def -> copies map
141 SourceMap SrcMap; // Src -> Def map
151 unsigned Def = MI->getOperand(0).getReg();
154 if (TargetRegisterInfo::isVirtualRegister(Def) ||
[all...] |
| LiveVariables.cpp | 114 assert(MBB != &MF->front() && "Can't find reaching def for virtreg");
133 assert(MRI->getVRegDef(reg) && "Register use before def!");
190 /// FindLastPartialDef - Return the last partial def of the specified register.
199 MachineInstr *Def = PhysRegDef[SubReg];
200 if (!Def)
202 unsigned Dist = DistanceMap[Def];
205 LastDef = Def;
228 /// HandlePhysRegUse - Turn previous partial def's into read/mod/writes. Add
229 /// implicit defs to a machine instruction if there was an earlier def of its
233 // If there was a previous use or a "full" def all is well
[all...] |
| MachineCSE.cpp | 203 // See a def of Reg (or an alias) before encountering any use, it's
215 /// returns the physical register def by reference if it's the only one and the
251 // Check against PhysRefs even if the def is "dead".
254 // If the def is dead, it's ok. But the def may not marked "dead". That's
388 // Heuristics #1: Don't CSE "cheap" computation if the def is not local or in
543 // Go through implicit defs of CSMI and MI, if a def is not dead at MI,
587 MachineInstr *Def = MRI->getUniqueVRegDef(NewReg);
588 assert(Def != nullptr && "CSEd register has no unique definition?");
589 Def->clearRegisterDeads(NewReg)
[all...] |
| PeepholeOptimizer.cpp | 177 /// follows the use-def chain to find successive suitable sources.
179 /// def = COPY src.
184 /// def = COPY v2.sub0
186 /// Using a ValueTracker for def = COPY v2.sub0 will give the following
189 /// Then, def can be rewritten into def = COPY v0.
192 /// The current point into the use-def chain.
193 const MachineInstr *Def;
194 /// The index of the definition in Def.
251 : Def(nullptr), DefIdx(0), DefSubReg(DefSubReg), Reg(Reg)
[all...] |
| SplitKit.cpp | 101 if (!SlotIndex::isEarlierInstr(VNI->def, LSP.second) && VNI->def < MBBEnd)
125 UseSlots.push_back(VNI->def);
127 // Get use slots form the use-def chain.
208 // When not live in, the first use should be a def.
210 assert(LVI->start == LVI->valno->def && "Dangling Segment start");
211 assert(LVI->start == BI.FirstInstr && "First instr should be a def");
241 // A Segment that starts in the middle of the block must be a def.
242 assert(LVI->start == LVI->valno->def && "Dangling Segment start");
376 // Keep it as a simple def without any liveness
[all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64AdvSIMDScalarPass.cpp | 206 MachineRegisterInfo::def_instr_iterator Def =
208 assert(std::next(Def) == MRI->def_instr_end() && "Multiple def in SSA!");
209 Src0 = getSrcFromCopy(&*Def, MRI, SubReg0);
219 MachineRegisterInfo::def_instr_iterator Def =
221 assert(std::next(Def) == MRI->def_instr_end() && "Multiple def in SSA!");
222 Src1 = getSrcFromCopy(&*Def, MRI, SubReg1);
299 MachineRegisterInfo::def_instr_iterator Def =
301 assert(std::next(Def) == MRI->def_instr_end() && "Multiple def in SSA!")
[all...] |
| /external/clang/lib/Lex/ |
| PPMacroExpansion.cpp | 226 MacroDirective::DefInfo Def = MD->getDefinition();
227 assert(Def.isValid());
228 MacroInfo *MI = Def.getMacroInfo();
302 if (Def.getDirective()->isAmbiguous()) {
307 for (MacroDirective::DefInfo PrevDef = Def.getPreviousDefinition();
[all...] |
| PreprocessingRecord.cpp | 321 MacroDefinition *Def) {
322 MacroDefinitions[Macro] = Def;
377 else if (MacroDefinition *Def = findMacroDefinition(MI))
379 new (*this) MacroExpansion(Def, Range));
421 MacroDefinition *Def
423 addPreprocessedEntity(Def);
424 MacroDefinitions[MI] = Def;
|
| Preprocessor.cpp | 325 Def = I->second->findDirectiveAtLoc(Loc, SourceMgr);
326 if (!Def || !Def.getMacroInfo())
328 if (!Def.getMacroInfo()->isObjectLike())
330 if (!MacroDefinitionEquals(Def.getMacroInfo(), Tokens))
332 SourceLocation Location = Def.getLocation();
|
| /external/llvm/lib/Target/SystemZ/ |
| SystemZElimCompare.cpp | 40 : Def(false), Use(false), IndirectDef(false), IndirectUse(false) {}
43 Def |= Other.Def;
50 explicit operator bool() const { return Def || Use; }
54 bool Def;
151 Ref.Def = true;
347 (!CCRefs.Def && adjustCCMasksForInstr(MI, Compare, CCUsers))) {
353 if (SrcRefs.Def)
356 if (CCRefs.Use && CCRefs.Def)
450 if (CCRefs.Def) {
[all...] |
| /external/llvm/include/llvm/Analysis/ |
| MemoryDependenceAnalysis.h | 56 /// Def - This is a dependence on the specified instruction which
64 /// that the def may not be the same type as the query, the pointers
69 /// 3. Dependence queries on calls return Def only when they are
73 Def,
105 assert(Inst && "Def requires inst");
106 return MemDepResult(PairTy(Inst, Def));
131 bool isDef() const { return Value.getInt() == Def; }
|
| /external/llvm/lib/TableGen/ |
| TGLexer.h | 46 Bit, Bits, Class, Code, Dag, Def, Foreach, Defm, Field, In, Int, Let, List,
|
| /external/llvm/lib/Target/ARM/ |
| A15SDOptimizer.cpp | 209 MachineInstr *Def = Op->getParent();
213 if (DeadInstr.find(Def) != DeadInstr.end())
220 for (unsigned int j = 0; j < Def->getNumOperands(); ++j) {
221 MachineOperand &MODef = Def->getOperand(j);
233 if (&*II == Def)
244 DEBUG(dbgs() << "Deleting instruction " << *Def << "\n");
245 DeadInstr.insert(Def);
314 MachineInstr *Def = MRI->getVRegDef(OpReg);
315 if (!Def)
317 if (Def->isImplicitDef()
[all...] |
